On Thu, Oct 2, 2008 at 12:43 AM, DJ Delorie <[EMAIL PROTECTED]> wrote: > >> I think this is the wrong place to fix this. If you would override >> the sizetypes precision from your target, would that fix it? That >> is, in stor-layout.c set_sizetype make the target allow adjusting >> the passed type (which is supposed to be sizetype). If at all then >> these types should be consistent. > > The problem is that the chip has 24 bit pointers, but 16 bit > registers. It has math operations for 16 bit numbers and some 32 bit > numbers (the rest are emulated). It has a few operations for 24 bit > numbers. There are no C types for 24 bit numbers (PSImode is 32 bits > wide with 24 bit precision, if I tweak its precision manually it tries > to use bitfield instructions all over the place, if I don't it uses > "long int" which is wrong).
(what is the current sizetype mode?) There are no bitfield instructions. What I suggest is that you make sizetype 16bits (HImode), as if I remember correctly you are not concerned anyway about pointer offsets larger than what fits into signed 16bits. If you then use the expansion patch I suggested I don't see why it should not work. Richard.
