Dave Korn wrote:
> Dave Korn wrote:
>> H.J. Lu wrote:
>>> An IRA setjmp bug was fixed recently:
>>>
>>> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38587
>>>
>>> Does it fix your problem?
>> I'm not sure, but my source tree is at r.143552, which is just a couple
>> of revs before your fix went in. I will test it and report back; thanks
>> for the hint.
>
> Unfortunately the patch for 38587 made no difference at all to the
> generated code, including the incorrect initial frame pointer offset
> calculation; my test case compiles identically. This is not unsurprising
> to me; there doesn't appear to be any stack slot sharing going on here.
> Thanks for trying to help, H.J.
>
> So, my main problem remains; I still don't know if what IRA is doing here
> is permitted: eliminating the FP to a constant offset from the SP, before
> reload. I'll have to see what any of the IRA or RTL maintainers have to
> say.
Hmm, or maybe I won't; -fno-ira doesn't make any difference, which suggests
that it's perhaps a problem in the backend. In a non-IRA build, pass
172r.lreg has:
(insn 49 48 51 2 (set (mem:SI (reg/f:SI 63) [0 S4 A8])
(reg/f:SI 20 frame)) 41 {*movsi_1} (nil))
and pass 173r.greg has
(insn 73 48 49 2 (set (reg:SI 1 dx)
(plus:SI (reg/f:SI 7 sp)
(const_int 80 [0x50]))) 209 {*lea_1} (nil))
(insn 49 73 51 2 (set (mem:SI (reg/f:SI 0 ax [63]) [0 S4 A8])
(reg:SI 1 dx)) 41 {*movsi_1} (nil))
and here we can see that it's reload doing the FP elimination:
Reloads for insn # 49
Reload 0: reload_out (SI) = (mem:SI (reg/f:SI 0 ax [63]) [0 S4 A8])
NO_REGS, RELOAD_FOR_OUTPUT (opnum = 0), optional
reload_out_reg: (mem:SI (reg/f:SI 0 ax [63]) [0 S4 A8])
Reload 1: reload_in (SI) = (plus:SI (reg/f:SI 7 sp)
(const_int 80 [0x50]))
GENERAL_REGS, RELOAD_FOR_INPUT (opnum = 1)
reload_in_reg: (plus:SI (reg/f:SI 7 sp)
(const_int 80 [0x50]))
reload_reg_rtx: (reg:SI 1 dx)
So... it's somewhere between reload and the back end.
cheers,
DaveK
