If I want the compiler to understand the inline assembly is it possible to write define_insn which would match the pattern that GCC creates for the inline assembly and then GCC would be able to 'know' some attributes about this insn and would be able to parallelize it?
2010/10/26 roy rosen <roy.1ro...@gmail.com>: > I didn't give the full details of the instruction but for example a > max instruction which gets an array and returns both the max value and > its index in the array will need to return more than one argument. > > 2010/10/26 Ian Lance Taylor <i...@google.com>: >> roy rosen <roy.1ro...@gmail.com> writes: >> >>> I am trying to demonstrate my port capabilities. >>> I am writing an application which needs to use instructions like max >>> a,b,c,d,e,f where a,b,c are inputs and d,e,f are outputs. >>> Is that possible to write an intrinsic function for that? >>> I think not because that means that I need to pass d,e,f by reference >>> which means that they would be in memory and not in a register as >>> meant by the instruction. >> >> That is correct. An intrinsic function is a normal function. If you >> want it to have multiple outputs, you need to pass in addresses, or you >> need to have it return a struct. >> >> I'm a bit curious as to why a function named max would have multiple >> outputs. >> >>> Is there any port with such an example? >> >> Not to my knowledge. I wrote a private port in which some intrinsics >> returned a struct, and to keep everything out of memory I added >> additional intrinsics to retrieve elements of the struct. It's awkward >> to use but the resulting code is fine. >> >>> So, I thought of implementing that with inline assembly but here I >>> encounter a different problem: The compiler does not understand the >>> instruction given in inline assembly and therefore it does not >>> parallelize it with other insns. >> >> Yes. >> >>> Is there any other solution for that which I don't see? >> >> I can't think of anything. >> >> Ian >> >
