On 16/05/18 17:21, Steve Ellcey wrote: > On Tue, 2018-05-15 at 18:29 +0000, Francesco Petrogalli wrote: > >> Hi Steve, >> >> I am happy to let you know that the Vector Function ABI for AArch64 >> is now public and available via the link at [1]. >> >> Don’t hesitate to contact me in case you have any questions. >> >> Kind regards, >> >> Francesco >> >> [1] https://developer.arm.com/products/software-development-tools/hpc >> /arm-compiler-for-hpc/vector-function-abi >> >>> >>> Steve Ellcey >>> sell...@cavium.com > > Thanks for publishing this Francesco, it looks like the main issue for > GCC is that the Vector Function ABI has different caller saved / callee > saved register conventions than the standard ARM calling convention. > > If I understand things correctly, in the standard calling convention > the callee will only save the bottom 64 bits of V8-V15 and so the > caller needs to save those registers if it is using the top half. In > the Vector calling convention the callee will save all 128 bits of > these registers (and possibly more registers) so the caller does not > have to save these registers at all, even if it is using all 128 bits > of them. > > It doesn't look like GCC has any existing mechanism for having different > sets of caller saved/callee saved registers depending on the function > attributes of the calling or called function. > > Changing what registers a callee function saves and restores shouldn't > be too difficult since that can be done when generating the prologue > and epilogue code but changing what registers a caller saves/restores > when doing the call seems trickier. The macro > TARGET_HARD_REGNO_CALL_PART_CLOBBERED doesn't know anything about the > function being called. It returns true/false depending on just the > register number and mode. > > Steve Ellcey > sell...@cavium.com >
Actually, we can. See, for example, the attribute((pcs)) for the ARM port. I think we could probably handle this automagically for the SVE vector calling convention in AArch64. R.
