https://gcc.gnu.org/g:0ad1905bf050c166da42250094206c4f839c571f

commit r15-7028-g0ad1905bf050c166da42250094206c4f839c571f
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Sun Jan 19 00:17:46 2025 +0000

    Daily bump.

Diff:
---
 gcc/ChangeLog           | 103 +++++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |   2 +-
 gcc/cp/ChangeLog        |  13 +++++
 gcc/d/ChangeLog         |   4 ++
 gcc/testsuite/ChangeLog | 131 ++++++++++++++++++++++++++++++++++++++++++++++++
 libphobos/ChangeLog     |   5 ++
 6 files changed, 257 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 91238b50a774..3d72f81ad0ab 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,106 @@
+2025-01-18  Jeff Law  <j...@ventanamicro.com>
+
+       PR target/116308
+       * config/riscv/riscv.cc (riscv_lshift_subword): Use gen_lowpart
+       rather than simplify_gen_subreg.
+
+2025-01-18  Michal Jires  <mji...@suse.cz>
+
+       * cgraph.cc (symbol_table::create_empty):
+       Move uid to symtab_node.
+       (test_symbol_table_test): Change expected dump id.
+       * cgraph.h (struct cgraph_node):
+       Move uid to symtab_node.
+       (symbol_table::register_symbol): Likewise.
+       * dumpfile.cc (test_capture_of_dump_calls):
+       Change expected dump id.
+       * ipa-inline.cc (update_caller_keys):
+       Use summary id instead of uid.
+       (update_callee_keys): Likewise.
+       * symtab.cc (symtab_node::get_dump_name):
+       Use uid instead of order.
+
+2025-01-18  Eric Botcazou  <ebotca...@adacore.com>
+
+       PR target/118512
+       * config/sparc/sparc-c.cc (sparc_target_macros): Deal with VIS 3B.
+       * config/sparc/sparc.cc (dump_target_flag_bits): Likewise.
+       (sparc_option_override): Likewise.
+       (sparc_vis_init_builtins): Likewise.
+       * config/sparc/sparc.md (fpcmp_vis): Replace TARGET_VIS3 with
+       TARGET_VIS3B.
+       (vec_cmp): Likewise.
+       (fpcmpu_vis): Likewise.
+       (vec_cmpu): Likewise.
+       (vcond_mask_): Likewise.
+       * config/sparc/sparc.opt (VIS3B): New target mask.
+       * doc/invoke.texi (SPARC options): Document -mvis3b.
+
+2025-01-18  Jin Ma  <ji...@linux.alibaba.com>
+
+       PR target/118357
+       * config/riscv/riscv-vsetvl.cc: Function change_vtype_only_p always
+       returns false for XTheadVector.
+
+2025-01-18  Richard Biener  <rguent...@suse.de>
+
+       PR tree-optimization/118529
+       * tree-vect-stmts.cc (vectorizable_condition): Check the
+       shape of the vector and condition vector type are compatible.
+
+2025-01-18  Georg-Johann Lay  <a...@gjlay.de>
+
+       * doc/invoke.texi (AVR Options): Fix plenk at -msplit-ldst.
+
+2025-01-18  Akram Ahmad  <akram.ah...@arm.com>
+           Tamar Christina  <tamar.christ...@arm.com>
+
+       * config/aarch64/aarch64-builtins.cc: Expand iterators.
+       * config/aarch64/aarch64-simd-builtins.def: Use standard names
+       * config/aarch64/aarch64-simd.md: Use standard names, split insn
+       definitions on signedness of operator and type of operands.
+       * config/aarch64/arm_neon.h: Use standard builtin names.
+       * config/aarch64/iterators.md: Add VSDQ_I_QI_HI iterator to
+       simplify splitting of insn for unsigned scalar arithmetic.
+
+2025-01-18  Akram Ahmad  <akram.ah...@arm.com>
+
+       * config/aarch64/aarch64-sve.md: Rename insns
+
+2025-01-18  Tamar Christina  <tamar.christ...@arm.com>
+
+       Revert:
+       2025-01-17  Tamar Christina  <tamar.christ...@arm.com>
+
+       * config/aarch64/aarch64-builtins.cc: Expand iterators.
+       * config/aarch64/aarch64-simd-builtins.def: Use standard names
+       * config/aarch64/aarch64-simd.md: Use standard names, split insn
+       definitions on signedness of operator and type of operands.
+       * config/aarch64/arm_neon.h: Use standard builtin names.
+       * config/aarch64/iterators.md: Add VSDQ_I_QI_HI iterator to
+       simplify splitting of insn for unsigned scalar arithmetic.
+
+2025-01-18  Tamar Christina  <tamar.christ...@arm.com>
+
+       Revert:
+       2025-01-17  Tamar Christina  <tamar.christ...@arm.com>
+
+       * config/aarch64/aarch64-sve.md: Rename insns
+
+2025-01-18  Monk Chiang  <monk.chi...@sifive.com>
+
+       * config/riscv/riscv.cc: Remove unused variable.
+
+2025-01-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/loongarch.cc (loongarch_rtx_costs): Fix the
+       cost for (a + b * imm) and (a + (b << imm)) which can be
+       implemented with a single alsl instruction.
+
+2025-01-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/loongarch.md (alslsi3_extend): Add alsl.wu.
+
 2025-01-17  Vladimir N. Makarov  <vmaka...@redhat.com>
 
        PR rtl-optimization/118067
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index d05d499d8a4e..df2e7f62043e 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20250118
+20250119
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 320ecc40f7ee..c1f07aa4b7cb 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,16 @@
+2025-01-18  Jakub Jelinek  <ja...@redhat.com>
+
+       PR c++/118513
+       * decl2.cc (copy_linkage): If not TREE_PUBLIC, also set
+       DECL_INTERFACE_KNOWN, assert it was set on decl and copy
+       DECL_NOT_REALLY_EXTERN flags.
+
+2025-01-18  Jakub Jelinek  <ja...@redhat.com>
+
+       PR c++/118534
+       * constexpr.cc (find_array_ctor_elt): Don't return i early if
+       i == end - 1 and the last elt's value is RAW_DATA_CST.
+
 2025-01-17  Nathaniel Shead  <nathanielosh...@gmail.com>
 
        PR c++/118049
diff --git a/gcc/d/ChangeLog b/gcc/d/ChangeLog
index 5b14c3411b69..1c23ea45fd38 100644
--- a/gcc/d/ChangeLog
+++ b/gcc/d/ChangeLog
@@ -1,3 +1,7 @@
+2025-01-18  Iain Buclaw  <ibuc...@gdcproject.org>
+
+       * dmd/MERGE: Merge upstream dmd d115713410.
+
 2025-01-16  Iain Buclaw  <ibuc...@gdcproject.org>
 
        PR d/115249
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 27cedf2ad485..8cb7c91e4681 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,134 @@
+2025-01-18  Iain Buclaw  <ibuc...@gdcproject.org>
+
+       * gdc.dg/asm3.d: Adjust test.
+
+2025-01-18  Jakub Jelinek  <ja...@redhat.com>
+
+       PR c++/118513
+       * g++.dg/modules/decomp-3_a.H: New test.
+       * g++.dg/modules/decomp-3_b.C: New test.
+
+2025-01-18  Jeff Law  <j...@ventanamicro.com>
+
+       PR target/116308
+       * gcc.target/riscv/pr116308.c: New test.
+
+2025-01-18  Michal Jires  <mji...@suse.cz>
+
+       * gcc.dg/live-patching-1.c: Change expected dump id.
+       * gcc.dg/live-patching-4.c: Likewise.
+
+2025-01-18  Eric Botcazou  <ebotca...@adacore.com>
+
+       * gcc.target/sparc/20230328-1.c: Pass -mvis3b instead of -mvis3.
+       * gcc.target/sparc/20230328-4.c: Likewise.
+       * gcc.target/sparc/fucmp.c: Likewise.
+       * gcc.target/sparc/vis3misc.c: Likewise.
+
+2025-01-18  Bohan Lei  <garth...@linux.alibaba.com>
+
+       * gcc.target/riscv/crc-21-rv64-zbc.c: Disallow rv32 targets.
+       * gcc.target/riscv/crc-21-rv64-zbkc.c: Ditto.
+
+2025-01-18  Jin Ma  <ji...@linux.alibaba.com>
+
+       PR target/118357
+       * gcc.target/riscv/rvv/xtheadvector/pr118357.c: New test.
+
+2025-01-18  Richard Biener  <rguent...@suse.de>
+
+       PR tree-optimization/118529
+       * gcc.target/sparc/pr118529.c: New testcase.
+
+2025-01-18  Akram Ahmad  <akram.ah...@arm.com>
+           Tamar Christina  <tamar.christ...@arm.com>
+
+       * gcc.target/aarch64/scalar_intrinsics.c: Update testcases.
+       * 
gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect.inc:
+       Template file for unsigned vector saturating arithmetic tests.
+       * 
gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_1.c:
+       8-bit vector type tests.
+       * 
gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_2.c:
+       16-bit vector type tests.
+       * 
gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_3.c:
+       32-bit vector type tests.
+       * 
gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_4.c:
+       64-bit vector type tests.
+       * gcc.target/aarch64/saturating_arithmetic.inc: Template file
+       for scalar saturating arithmetic tests.
+       * gcc.target/aarch64/saturating_arithmetic_1.c: 8-bit tests.
+       * gcc.target/aarch64/saturating_arithmetic_2.c: 16-bit tests.
+       * gcc.target/aarch64/saturating_arithmetic_3.c: 32-bit tests.
+       * gcc.target/aarch64/saturating_arithmetic_4.c: 64-bit tests.
+       * gcc.target/aarch64/saturating-arithmetic-signed.c: New file.
+
+2025-01-18  Akram Ahmad  <akram.ah...@arm.com>
+
+       * gcc.target/aarch64/sve/saturating_arithmetic.inc:
+       Template file for auto-vectorizer tests.
+       * gcc.target/aarch64/sve/saturating_arithmetic_1.c:
+       Instantiate 8-bit vector tests.
+       * gcc.target/aarch64/sve/saturating_arithmetic_2.c:
+       Instantiate 16-bit vector tests.
+       * gcc.target/aarch64/sve/saturating_arithmetic_3.c:
+       Instantiate 32-bit vector tests.
+       * gcc.target/aarch64/sve/saturating_arithmetic_4.c:
+       Instantiate 64-bit vector tests.
+
+2025-01-18  Tamar Christina  <tamar.christ...@arm.com>
+
+       Revert:
+       2025-01-18  Tamar Christina  <tamar.christ...@arm.com>
+
+       * gcc.target/aarch64/scalar_intrinsics.c: Update testcases.
+       * 
gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect.inc:
+       Template file for unsigned vector saturating arithmetic tests.
+       * 
gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_1.c:
+       8-bit vector type tests.
+       * 
gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_2.c:
+       16-bit vector type tests.
+       * 
gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_3.c:
+       32-bit vector type tests.
+       * 
gcc.target/aarch64/advsimd-intrinsics/saturating_arithmetic_autovect_4.c:
+       64-bit vector type tests.
+       * gcc.target/aarch64/saturating_arithmetic.inc: Template file
+       for scalar saturating arithmetic tests.
+       * gcc.target/aarch64/saturating_arithmetic_1.c: 8-bit tests.
+       * gcc.target/aarch64/saturating_arithmetic_2.c: 16-bit tests.
+       * gcc.target/aarch64/saturating_arithmetic_3.c: 32-bit tests.
+       * gcc.target/aarch64/saturating_arithmetic_4.c: 64-bit tests.
+       * gcc.target/aarch64/saturating-arithmetic-signed.c: New file.
+
+2025-01-18  Tamar Christina  <tamar.christ...@arm.com>
+
+       Revert:
+       2025-01-18  Tamar Christina  <tamar.christ...@arm.com>
+
+       * gcc.target/aarch64/sve/saturating_arithmetic.inc:
+       Template file for auto-vectorizer tests.
+       * gcc.target/aarch64/sve/saturating_arithmetic_1.c:
+       Instantiate 8-bit vector tests.
+       * gcc.target/aarch64/sve/saturating_arithmetic_2.c:
+       Instantiate 16-bit vector tests.
+       * gcc.target/aarch64/sve/saturating_arithmetic_3.c:
+       Instantiate 32-bit vector tests.
+       * gcc.target/aarch64/sve/saturating_arithmetic_4.c:
+       Instantiate 64-bit vector tests.
+
+2025-01-18  Jakub Jelinek  <ja...@redhat.com>
+
+       PR c++/118534
+       * g++.dg/cpp/embed-24.C: New test.
+       * g++.dg/cpp1y/pr118534.C: New test.
+
+2025-01-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * gcc.target/loongarch/alsl-cost.c: New test.
+
+2025-01-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * gcc.target/loongarch/alsl_wu.c: New test.
+
 2025-01-17  Harald Anlauf  <anl...@gmx.de>
 
        PR libfortran/118536
diff --git a/libphobos/ChangeLog b/libphobos/ChangeLog
index b7935650ccbe..87b13b2ea000 100644
--- a/libphobos/ChangeLog
+++ b/libphobos/ChangeLog
@@ -1,3 +1,8 @@
+2025-01-18  Iain Buclaw  <ibuc...@gdcproject.org>
+
+       * libdruntime/MERGE: Merge upstream druntime d115713410.
+       * src/MERGE: Merge upstream phobos 1b242048c.
+
 2025-01-14  Iain Buclaw  <ibuc...@gdcproject.org>
 
        PR d/118438

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