https://gcc.gnu.org/g:204fa2eede487a8f9868fcffe406212a4b02ed18
commit r16-1293-g204fa2eede487a8f9868fcffe406212a4b02ed18
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Mon Jun 9 00:18:17 2025 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 81 +++++++++++++++++++++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/testsuite/ChangeLog | 24 +++++++++++++++
libstdc++-v3/ChangeLog | 4 +++
4 files changed, 110 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 45808049218f..6a4f5ebcdbc6 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,84 @@
+2025-06-08 Kugan Vivekanandarajah <kvivekana...@nvidia.com>
+
+ * auto-profile.cc (function_instance::merge): Fix typo.
+
+2025-06-08 Vineet Gupta <vine...@rivosinc.com>
+
+ PR target/120203
+ * config/riscv/riscv.cc (CFUN_IN_CALL): New macro.
+ (struct mode_switching_info): Add new field.
+ (riscv_frm_adjust_mode_after_call): Remove.
+ (riscv_frm_mode_needed): Track call_insn.
+
+2025-06-08 Vineet Gupta <vine...@rivosinc.com>
+
+ PR target/119164
+ * config/riscv/riscv.cc (riscv_emit_frm_mode_set): check
+ STATIC_FRM_P for transition to DYN.
+
+2025-06-08 Vineet Gupta <vine...@rivosinc.com>
+
+ * config/riscv/riscv.cc (riscv_frm_emit_after_bb_end): Delete.
+ (riscv_frm_mode_needed): Remove call riscv_frm_emit_after_bb_end.
+
+2025-06-08 Vineet Gupta <vine...@rivosinc.com>
+
+ * config/riscv/riscv.cc (riscv_dynamic_frm_mode_p): Remove.
+ (riscv_mode_confluence): Ditto.
+ (TARGET_MODE_CONFLUENCE): Ditto.
+
+2025-06-08 Vineet Gupta <vine...@rivosinc.com>
+
+ * emit-rtl.cc (next_nonnote_nondebug_insn): Update comments.
+
+2025-06-08 Andrew Pinski <quic_apin...@quicinc.com>
+
+ * tree-ssa-phiopt.cc (cond_if_else_store_replacement): Move
+ definitin of else_vdef to right before the usage. Reformat
+ slightly.
+
+2025-06-08 Andrew Pinski <quic_apin...@quicinc.com>
+
+ PR tree-optimization/120533
+ * tree-ssa-phiopt.cc (cond_if_else_store_replacement_limited): New
function.
+ (pass_phiopt::execute): Call cond_if_else_store_replacement_limited
+ for diamand case.
+
+2025-06-08 Andrew Pinski <quic_apin...@quicinc.com>
+
+ * tree-ssa-phiopt.cc (single_trailing_store_in_bb): Add vphi argument.
+ Check for single use of the vdef of the store instead of a loop
+ and check vdef's single use statement is the same as vphi.
+ (cond_if_else_store_replacement): Update call to
single_trailing_store_in_bb.
+
+2025-06-08 Andrew Pinski <quic_apin...@quicinc.com>
+
+ * tree-ssa-phiopt.cc (cond_if_else_store_replacement): Use
get_virtual_phi
+ instead of inlining it.
+
+2025-06-08 Co-authored-by: Jeff Law <j...@ventanamicro.com>
+
+ * config/riscv/riscv.cc (riscv_expand_conditional_move): Use
+ riscv_extend_comparands to extend sub-word comparison arguments.
+
+2025-06-08 Takayuki 'January June' Suwa <jjsuwa_sys3...@yahoo.co.jp>
+
+ * config/xtensa/xtensa.cc (printx, print_operand):
+ Add two instruction operand format codes 'U' and 'V',
+ whose represent scale factors of 0 to 15th positive/negative
+ power of two.
+ * config/xtensa/xtensa.md (c_enum "unspec"):
+ Add UNSPEC_CEIL and UNSPEC_FLOOR.
+ (int_iterator ANY_ROUND, int_attr m_round):
+ New integer iterator and its attribute.
+ (fix<s_fix>_truncsfsi2, *fix<s_fix>_truncsfsi2_2x,
+ *fix<s_fix>_truncsfsi2_scaled, float<s_float>sisf2,
+ *float<s_float>sisf2_scaled):
+ Use output templates with the operand formats added above,
+ instead of individual output statements.
+ (l<m_round>sfsi2, *l<m_round>sfsi2_2x, *l<m_round>sfsi2_scaled):
+ New insn patterns.
+
2025-06-07 Jeff Law <j...@ventanamicro.com>
* config/riscv/riscv.cc (riscv_expand_conditional_move): Use
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 800deb1dc5a5..d0f154b4f060 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20250608
+20250609
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 6de86efd7fac..6cf4a84229e6 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,27 @@
+2025-06-08 Kugan Vivekanandarajah <kvivekana...@nvidia.com>
+
+ * gcc.dg/tree-prof/clone-merge-1.c: Enable only for
+ -fauto-profile.
+
+2025-06-08 Vineet Gupta <vine...@rivosinc.com>
+
+ PR target/120203
+ * gcc.target/riscv/rvv/base/float-point-dynamic-frm-74.c: Expect
+ an additional FRRM.
+
+2025-06-08 Vineet Gupta <vine...@rivosinc.com>
+
+ PR target/119164
+ * gcc.target/riscv/rvv/base/pr119164.c: New test.
+
+2025-06-08 Andrew Pinski <quic_apin...@quicinc.com>
+
+ PR tree-optimization/120533
+ * gcc.dg/tree-ssa/pr35286.c: Add -fno-ssa-phiopt.
+ * gcc.dg/tree-ssa/split-path-6.c: Likewise.
+ * gcc.dg/tree-ssa/split-path-7.c: Likewise.
+ * gcc.dg/tree-ssa/phiprop-2.c: Move the check for MIN_EXPR to phiopt1.
+
2025-06-07 Gaius Mulley <gaiusm...@gmail.com>
PR modula2/119650
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index 473857b42d8d..cfb35f223ae3 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,7 @@
+2025-06-08 John David Anglin <dang...@gcc.gnu.org>
+
+ * config/abi/post/hppa-linux-gnu/baseline_symbols.txt: Update.
+
2025-06-06 Jonathan Wakely <jwak...@redhat.com>
* testsuite/30_threads/semaphore/1.cc: Check type properties and
