https://gcc.gnu.org/g:3b58b78f1a1fed8b273ee88f42bf5b5bc189d511

commit r16-3272-g3b58b78f1a1fed8b273ee88f42bf5b5bc189d511
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date:   Tue Aug 19 00:20:02 2025 +0000

    Daily bump.

Diff:
---
 ChangeLog              |   4 ++
 gcc/ChangeLog          | 177 +++++++++++++++++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP          |   2 +-
 gcc/c-family/ChangeLog |  10 +++
 gcc/c/ChangeLog        |   5 ++
 gcc/cp/ChangeLog       |   5 ++
 gcc/d/ChangeLog        |   5 ++
 libstdc++-v3/ChangeLog |  42 ++++++++++++
 8 files changed, 249 insertions(+), 1 deletion(-)

diff --git a/ChangeLog b/ChangeLog
index 0cbf930f08f7..0f1255e5e76b 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,7 @@
+2025-08-18  Spencer Abson  <spencer.ab...@student.manchester.ac.uk>
+
+       * MAINTAINERS: Update my email address.
+
 2025-08-17  Filip Kastl  <fka...@suse.cz>
 
        * MAINTAINERS: Switch around Andrew Pinski's entries in
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 7245e5a386ef..144dc217a891 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,180 @@
+2025-08-18  Andrew Pinski  <andrew.pin...@oss.qualcomm.com>
+
+       PR middle-end/121581
+       * doc/extend.texi (__builtin_object_size): Fix example.
+
+2025-08-18  Indu Bhagat  <indu.bha...@oracle.com>
+
+       * flag-types.h (sanitize_code_type): Define.
+       * asan.h (sanitize_flags_p): Use 'sanitize_code_type' instead of
+       'unsigned int'.
+       * common.opt: Likewise.
+       * dwarf2asm.cc (dw2_output_indirect_constant_1): Likewise.
+       * opts.cc (find_sanitizer_argument): Likewise.
+       (report_conflicting_sanitizer_options): Likewise.
+       (parse_sanitizer_options): Likewise.
+       (parse_no_sanitize_attribute): Likewise.
+       * opts.h (parse_sanitizer_options): Likewise.
+       (parse_no_sanitize_attribute): Likewise.
+       * tree-cfg.cc (print_no_sanitize_attr_value): Likewise.
+       * tree.cc (tree_fits_sanitize_code_type_p): Define.
+       (tree_to_sanitize_code_type): Likewise.
+       * tree.h (tree_fits_sanitize_code_type_p): Declare.
+       (tree_to_sanitize_code_type): Likewise.
+
+2025-08-18  Indu Bhagat  <indu.bha...@oracle.com>
+
+       * config/aarch64/aarch64.md (MEMTAG_TAG_MASK): New define
+       constant.
+       (MEMTAG_ADDR_MASK): Likewise.
+       (irg, subp, ldg): Use new constants.
+
+2025-08-18  Richard Sandiford  <richard.sandif...@arm.com>
+
+       PR rtl-optimization/97497
+       * function-abi.h (predefined_function_abi::only_partial_reg_clobbers)
+       (function_abi::only_partial_reg_clobbers): New member functions.
+       * gcse-common.cc: Include regs.h and function-abi.h.
+       (compute_transp): Check for partially call-clobbered registers
+       and treat them as not being transparent in blocks with calls.
+
+2025-08-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/sync.md (UNSPEC_TI_FETCH_ADD): New unspec.
+       (UNSPEC_TI_FETCH_SUB): Likewise.
+       (UNSPEC_TI_FETCH_AND): Likewise.
+       (UNSPEC_TI_FETCH_XOR): Likewise.
+       (UNSPEC_TI_FETCH_OR): Likewise.
+       (UNSPEC_TI_FETCH_NAND_MASK_INVERTED): Likewise.
+       (ALL_SC): New define_mode_iterator.
+       (_scq): New define_mode_attr.
+       (atomic_fetch_nand<mode>): Accept ALL_SC instead of only GPR.
+       (UNSPEC_TI_FETCH_DIRECT): New define_int_iterator.
+       (UNSPEC_TI_FETCH): New define_int_iterator.
+       (amop_ti_fetch): New define_int_attr.
+       (size_ti_fetch): New define_int_attr.
+       (atomic_fetch_<amop_ti_fetch>ti_scq): New define_insn.
+       (atomic_fetch_<amop_ti_fetch>ti): New define_expand.
+
+2025-08-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/sync.md (atomic_exchangeti_scq): New
+       define_insn.
+       (atomic_exchangeti): New define_expand.
+
+2025-08-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/sync.md (atomic_compare_and_swapti_scq): New
+       define_insn.
+       (atomic_compare_and_swapti): New define_expand.
+
+2025-08-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/loongarch.cc (loongarch_print_operand_reloc):
+       Accept "%t" for printing the number of the 64-bit machine
+       register holding the upper half of a TImode.
+       * config/loongarch/sync.md (atomic_storeti_scq): New
+       define_insn.
+       (atomic_storeti): expand to atomic_storeti_scq if !ISA_HAS_LSX.
+
+2025-08-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/genopts/isa-evolution.in (scq): New evolution
+       feature.
+       * config/loongarch/loongarch-evolution.cc: Regenerate.
+       * config/loongarch/loongarch-evolution.h: Regenerate.
+       * config/loongarch/loongarch-str.h: Regenerate.
+       * config/loongarch/loongarch.opt: Regenerate.
+       * config/loongarch/loongarch.opt.urls: Regenerate.
+       * config/loongarch/loongarch-def.cc: Make -mscq the default for
+       -march=la664 and -march=la64v1.1.
+       * doc/invoke.texi (LoongArch Options): Document -m[no-]scq.
+
+2025-08-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/sync.md (atomic_storeti_lsx): New
+       define_insn.
+       (atomic_storeti): New define_expand.
+
+2025-08-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/sync.md (atomic_loadti_lsx): New define_insn.
+       (atomic_loadti): New define_expand.
+
+2025-08-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/sync.md
+       (atomic_fetch_nand_mask_inverted<GPR:mode>): New define_insn.
+       (atomic_fetch_nand<GPR:mode>): New define_expand.
+
+2025-08-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/sync.md (atomic_fetch_sub<SHORT:mode>):
+       Disable if ISA_HAS_LAM_BH.
+
+2025-08-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/sync.md (UNSPEC_COMPARE_AND_SWAP_AND):
+       Remove.
+       (UNSPEC_COMPARE_AND_SWAP_XOR): Remove.
+       (UNSPEC_COMPARE_AND_SWAP_OR): Remove.
+       (atomic_test_and_set): Rename to ...
+       (atomic_fetch_<any_bitwise:amop><SHORT:mode>): ... this, and
+       adapt the expansion to use it for any bitwise operations and any
+       val, instead of just ior 1.
+       (atomic_test_and_set): New define_expand.
+
+2025-08-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/sync.md (atomic_test_and_set): Remove
+       unneeded andi instruction from the expansion.
+
+2025-08-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/loongarch.cc (loongarch_print_operand_reloc):
+       Make "%T" output a comment marker if the operand is a memory
+       order for which the barrier won't be generated; remove "%t".
+       * config/loongarch/sync.md (atomic_cas_value_strong<mode>): Add
+       %T before "b 3f".
+       (atomic_cas_value_cmp_and_7_<mode>): Likewise.
+
+2025-08-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/sync.md (UNSPEC_COMPARE_AND_SWAP_AMCAS): New
+       UNSPEC code.
+       (atomic_cas_value_strong<mode>): NFC, update the comment to note
+       we only need to consider failure memory order.
+       (atomic_cas_value_strong<mode>_amcas): Use
+       UNSPEC_COMPARE_AND_SWAP_AMCAS instead of
+       UNSPEC_COMPARE_AND_SWAP.
+       (atomic_compare_and_swap<mode:GPR>): Pass failure memorder to
+       gen_atomic_cas_value_strong<mode>.
+       (atomic_compare_and_swap<mode:SHORT>): Pass failure memorder to
+       gen_atomic_cas_value_cmp_and_7_si.
+
+2025-08-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/sync.md (atomic_test_and_set): Use bstrins
+       for masking the address if possible.
+
+2025-08-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/sync.md (atomic_load<mode>): Remove "+" for
+       the memory operand.
+       (atomic_store<mode>): Use "=" instead of "+" for the memory
+       operand.
+
+2025-08-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/sync.md: Use <size> instead of <amo>.
+       (amo): Remove.
+
+2025-08-18  Xi Ruoyao  <xry...@xry111.site>
+
+       * config/loongarch/sync.md (atomic_optab): Remove.
+       (atomic_<atomic_optab><mode>): Change atomic_optab to amop.
+       (atomic_fetch_<atomic_optab><mode>): Likewise.
+
 2025-08-17  Austin Law  <austink...@gmail.com>
 
        PR target/121213
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 31dab4332477..cfd590519fb8 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20250818
+20250819
diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog
index a0208749c2ff..3c3814bf2ef1 100644
--- a/gcc/c-family/ChangeLog
+++ b/gcc/c-family/ChangeLog
@@ -1,3 +1,13 @@
+2025-08-18  Indu Bhagat  <indu.bha...@oracle.com>
+
+       * c-attribs.cc (add_no_sanitize_value): Use 'sanitize_code_type'
+       instead of 'unsigned int'.
+       (handle_no_sanitize_attribute): Likewise.
+       (handle_no_sanitize_address_attribute): Likewise.
+       (handle_no_sanitize_thread_attribute): Likewise.
+       (handle_no_address_safety_analysis_attribute): Likewise.
+       * c-common.h (add_no_sanitize_value): Likewise.
+
 2025-08-15  Jakub Jelinek  <ja...@redhat.com>
 
        PR c++/121552
diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index 71704b294045..b532ca6c6d42 100644
--- a/gcc/c/ChangeLog
+++ b/gcc/c/ChangeLog
@@ -1,3 +1,8 @@
+2025-08-18  Indu Bhagat  <indu.bha...@oracle.com>
+
+       * c-parser.cc (c_parser_declaration_or_fndef): Use
+       'sanitize_code_type' instead of 'unsigned int'.
+
 2025-08-15  Jakub Jelinek  <ja...@redhat.com>
 
        PR preprocessor/120778
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index e26089c3e51c..8dc116838236 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,8 @@
+2025-08-18  Indu Bhagat  <indu.bha...@oracle.com>
+
+       * typeck.cc (get_member_function_from_ptrfunc): Use
+       'sanitize_code_type' instead of 'unsigned int'.
+
 2025-08-17  Nathaniel Shead  <nathanielosh...@gmail.com>
 
        PR c++/120503
diff --git a/gcc/d/ChangeLog b/gcc/d/ChangeLog
index 8b86cd67b308..ab6042be5288 100644
--- a/gcc/d/ChangeLog
+++ b/gcc/d/ChangeLog
@@ -1,3 +1,8 @@
+2025-08-18  Indu Bhagat  <indu.bha...@oracle.com>
+
+       * d-attribs.cc (d_handle_no_sanitize_attribute): Use
+       'sanitize_code_type' instead of 'unsigned int'.
+
 2025-08-11  Iain Sandoe  <i...@sandoe.co.uk>
 
        * d-codegen.cc (build_filename_from_loc): Use
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index a003cba6b4ba..aec829ac19d2 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,45 @@
+2025-08-18  Tomasz Kamiński  <tkami...@redhat.com>
+
+       PR libstdc++/121476
+       * include/bits/ranges_algo.h (__all_of_fn::operator()):
+       (__any_of_fn::operator(), __none_of_fn::operator())
+       (__find_first_of_fn::operator(), __count_fn::operator())
+       (__find_end_fn::operator(), __remove_if_fn::operator())
+       (__remove_fn::operator(), __unique_fn::operator())
+       (__is_sorted_until_fn::operator(), __is_sorted_fn::operator())
+       (__lower_bound_fn::operator(), __upper_bound_fn::operator())
+       (__equal_range_fn::operator(), __binary_search_fn::operator())
+       (__is_partitioned_fn::operator(), __partition_point_fn::operator())
+       (__minmax_fn::operator(), __min_element_fn::operator())
+       (__includes_fn::operator(), __max_fn::operator())
+       (__lexicographical_compare_fn::operator(), __clamp__fn::operator())
+       (__find_last_fn::operator(), __find_last_if_fn::operator())
+       (__find_last_if_not_fn::operator()): Add [[nodiscard]] attribute.
+       * include/bits/ranges_algobase.h (__equal_fn::operator()):
+       Add [[nodiscard]] attribute.
+       * include/bits/ranges_util.h (__find_fn::operator())
+       (__find_if_fn::operator(), __find_if_not_fn::operator())
+       (__mismatch_fn::operator(), __search_fn::operator())
+       (__min_fn::operator(), __adjacent_find_fn::operator()):
+       Add [[nodiscard]] attribute.
+       * include/bits/stl_algo.h (std::min(initializer_list<T>))
+       (std::min(initializer_list<T>, _Compare))
+       (std::max(initializer_list<T>))
+       (std::mmax(initializer_list<T>, _Compare)): Add _GLIBCXX_NODISCARD.
+       * testsuite/25_algorithms/min/constrained.cc: Silence nodiscard
+       warning.
+       * testsuite/25_algorithms/max/constrained.cc: Likewise.
+       * testsuite/25_algorithms/minmax/constrained.cc: Likewise.
+       * testsuite/25_algorithms/minmax_element/constrained.cc: Likewise.
+
+2025-08-18  Tomasz Kamiński  <tkami...@redhat.com>
+
+       PR libstdc++/121313
+       * include/bits/vector.tcc (vector::insert_range): Add check for
+       empty size.
+       * testsuite/23_containers/vector/modifiers/insert/insert_range.cc:
+       New tests.
+
 2025-08-10  H.J. Lu  <hjl.to...@gmail.com>
 
        * configure: Regenerated.

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