https://gcc.gnu.org/g:8d311e1c37b30bb0a2766c7d2e040be79f884d93

commit r15-11064-g8d311e1c37b30bb0a2766c7d2e040be79f884d93
Author: GCC Administrator <[email protected]>
Date:   Thu Apr 9 00:19:34 2026 +0000

    Daily bump.

Diff:
---
 gcc/DATESTAMP           |   2 +-
 gcc/testsuite/ChangeLog | 105 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 106 insertions(+), 1 deletion(-)

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 875bc22c122b..1255a0d42f7a 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20260408
+20260409
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index fe3a5870ed9b..e3a0a21f47db 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,108 @@
+2026-04-08  Christophe Lyon  <[email protected]>
+
+       Backported from master:
+       2026-04-02  Christophe Lyon  <[email protected]>
+
+       PR target/124705
+       * gcc.dg/tree-ssa/gen-vect-26.c: Disable loop peeling check for
+       arm*-*-.
+       * gcc.dg/tree-ssa/gen-vect-28.c: Likewise.
+
+2026-04-08  Torbjörn SVENSSON  <[email protected]>
+
+       Backported from master:
+       2026-04-01  Torbjörn SVENSSON  <[email protected]>
+
+       PR target/124705
+       * gcc.dg/tree-ssa/gen-vect-26.c: Disable loop peeling check for
+       arm-none-eabi.
+       * gcc.dg/tree-ssa/gen-vect-28.c: Likewise.
+
+2026-04-08  Torbjörn SVENSSON  <[email protected]>
+
+       Backported from master:
+       2026-04-01  Torbjörn SVENSSON  <[email protected]>
+
+       PR testsuite/93080
+       * gcc.dg/tree-ssa/forwprop-40.c: Xfail for arm_mve.
+       * gcc.dg/tree-ssa/forwprop-41.c: Likewise.
+
+2026-04-08  Torbjörn SVENSSON  <[email protected]>
+
+       Backported from master:
+       2026-03-02  Torbjörn SVENSSON  <[email protected]>
+
+       * gcc.target/arm/addr-modes-int.c: Drop additional option
+       -march=armv7-a.
+
+2026-04-08  Alexandre Oliva  <[email protected]>
+
+       Backported from master:
+       2026-01-31  Alexandre Oliva  <[email protected]>
+
+       * gcc.dg/vect/complex/fast-math-complex-mls-half-float.c:
+       Don't expect COMPLEX_ADD_ROT270.
+
+2026-04-08  Christophe Lyon  <[email protected]>
+
+       Backported from master:
+       2025-11-06  Christophe Lyon  <[email protected]>
+
+       * lib/target-supports.exp
+       (check_effective_target_arm_v8_vfp_ok_nocache): New.
+       (check_effective_target_arm_v8_vfp_ok): Call the above helper, and
+       use global flags.
+       (add_options_for_arm_v8_vfp): Use et_arm_v8_vfp_flags.
+       * gcc.target/arm/lceil-vcvt_1.c: Remove -march=armv8-a.
+       * gcc.target/arm/lfloor-vcvt_1.c: Likewise.
+       * gcc.target/arm/lround-vcvt_1.c: Likewise.
+       * gcc.target/arm/vrinta-ce.c: Likewise.
+
+2026-04-08  Christophe Lyon  <[email protected]>
+
+       Backported from master:
+       2026-02-03  Christophe Lyon  <[email protected]>
+
+       * lib/target-supports.exp
+       (check_effective_target_arm_neon_ok_nocache): Add "-mcpu=unset
+       -march=armv7-a+simd -mfpu=auto" to the list.
+
+2026-04-08  Richard Earnshaw  <[email protected]>
+
+       Backported from master:
+       2026-01-29  Richard Earnshaw  <[email protected]>
+                   Artemiy Volkov  <[email protected]>
+
+       * lib/target-supports.exp:
+       (check_effective_target_arm_v8_3a_complex_neon_ok_nocache):
+       Split and fill in arm and aarch64 compile options.  Remove the
+       cpu_unset variable.
+       (check_effective_target_arm_v8_2a_fp16_neon_ok_nocache): Likewise.
+       (check_effective_target_arm_v8_3a_fp16_complex_neon_ok_nocache):
+       Likewise.
+       (check_effective_target_arm_neon_ok_nocache): Rework to use
+       -mfpu=auto.
+       (check_effective_target_arm_neon_fp16_ok_nocache): Likewise.
+
+2026-04-08  Christophe Lyon  <[email protected]>
+
+       Backported from master:
+       2025-09-01  Christophe Lyon  <[email protected]>
+
+       * lib/target-supports.exp
+       (check_effective_target_arm_neon_ok_nocache): Remove arm32 check.
+       Add istarget arm*-*-* check.
+       (check_effective_target_arm_neon_fp16_ok_nocache): Likewise.
+       (check_effective_target_arm_neon_softfp_fp16_ok_nocache): Likewise.
+       (check_effective_target_arm_v8_neon_ok_nocache): Likewise.
+       (check_effective_target_arm_neonv2_ok_nocache): Likewise.
+       (check_effective_target_vect_pack_trunc): Remove istarget arm*-*-*
+       check.
+       (check_effective_target_vect_unpack): Likewise.
+       (check_effective_target_vect_condition): Likewise.
+       (check_effective_target_vect_cond_mixed): Likewise.
+       (available_vector_sizes): Likewise.
+
 2026-04-07  Patrick Palka  <[email protected]>
 
        Backported from master:

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