https://gcc.gnu.org/g:65af1f796fc7dcdd98e9d94c19cabed64e332ccd
commit r17-584-g65af1f796fc7dcdd98e9d94c19cabed64e332ccd Author: GCC Administrator <[email protected]> Date: Tue May 19 00:16:28 2026 +0000 Daily bump. Diff: --- gcc/ChangeLog | 106 ++++++++++++++++++++++++++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 18 ++++++++ gcc/cp/ChangeLog | 4 ++ gcc/jit/ChangeLog | 7 ++++ gcc/po/ChangeLog | 4 ++ gcc/testsuite/ChangeLog | 54 ++++++++++++++++++++++++ libstdc++-v3/ChangeLog | 49 ++++++++++++++++++++++ 8 files changed, 243 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 50f321719ca5..f0ddfe351359 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,109 @@ +2026-05-18 Xin Wang <[email protected]> + + * tree-ssa-loop-split.cc (fix_loop_bb_probability): Rename + parameters from true_edge/false_edge to loop1_edge/loop2_edge + and scale both loops directly from their semantic edge + probabilities. + (split_loop): Derive loop1_edge and loop2_edge from initial_true. + Use them for loop1_prob, fix_loop_bb_probability, and iteration + estimate scaling. + +2026-05-18 Wang Yaduo <[email protected]> + + * config/riscv/riscv-cores.def: Add xt-c9501fdvt tune and core. + * doc/riscv-mcpu.texi: Regenerated. + * doc/riscv-mtune.texi: Regenerated. + +2026-05-18 Jeff Law <[email protected]> + + * config/riscv/riscv.cc (riscv_rtx_costs): Properly cost pack insns + for Zbkb. + * config/riscv/riscv.md (zero_extendsidi2): Expand into shift pairs + when the appropriate instructions are not available. + (zero_extendhi<GPR:mode>2): Simlarly. + (*zero_extendsidi2_internal): Make a simple define_insn. Only handle + MEM sources. + (*zero_extendhi<GPR2:mode>2): Similarly. + (zero_extendsidi2_shifted): Turn into a define_split and generalize + to handle more constants. + * config/riscv/predicates.md (dimode_shift_operand): New predicate. + +2026-05-18 Jeff Law <[email protected]> + + * ext-dce.cc (carry_backpropagate): Handle AND and IOR with a constant argument. + +2026-05-18 David Malcolm <[email protected]> + + * doc/analyzer.texi: Update for change in param name. + * doc/params.texi: Likewise. Clarify wording. + +2026-05-18 David Malcolm <[email protected]> + + * dump-context.h (dump_context::emit_optinfo): "info" is non-null, + so pass it by reference. + * dumpfile.cc (dump_context::end_any_optinfo): Update for above + change. + (dump_context::emit_optinfo): Likewise. + * optinfo-emit-json.cc: Update throughout to eliminate naked "new" + and "delete" in favor of std::make_unique and unique_ptr. Drop + redundant dtor. Use nullptr rather than NULL. Pass by + const-reference rather than by const-pointer in the places that + require non-null. + * optinfo-emit-json.h: Likewise. + * optinfo.cc (optinfo::emit_for_opt_problem): Update for above + changes. + +2026-05-18 Yoshinori Sato <[email protected]> + + * config/rx/rx.cc (rx_gen_move_template): Select the mode with the smallest size + for the mov instruction. + +2026-05-18 Kito Cheng <[email protected]> + + * expr.cc (calculate_reversed_crc): New function. + (assemble_reversed_crc_table): New function. + (generate_reversed_crc_table): New function. + (calculate_table_based_reversed_CRC): New function. + (expand_reversed_crc_table_based): Remove gen_reflecting_code + parameter. Use calculate_table_based_reversed_CRC. + * expr.h (expand_reversed_crc_table_based): Update prototype. + * builtins.cc (expand_builtin_crc_table_based): Update call. + * internal-fn.cc (expand_crc_optab_fn): Update call. + * config/aarch64/aarch64.md (crc_rev<ALLI:mode><ALLX:mode>4): + Update call. + * config/i386/i386.md (crc_rev<SWI124:mode>si4): Update call. + * config/loongarch/loongarch.md (crc_rev<mode>si4): Update call. + Remove local rbit lambda. + * config/riscv/bitmanip.md (crc_rev<ANYI1:mode><ANYI:mode>4): + Update call. Remove TARGET_ZBKB case. + * config/riscv/riscv.cc (generate_reflecting_code_using_brev): + Remove. + * config/riscv/riscv-protos.h (generate_reflecting_code_using_brev): + Remove declaration. + +2026-05-18 Robin Dapp <[email protected]> + + * config/riscv/riscv.cc (riscv_hard_regno_mode_ok): Remove else. + +2026-05-18 Robin Dapp <[email protected]> + + * config/riscv/riscv.cc (riscv_check_target_clone_version): Fix + format specifier. + +2026-05-18 Jakub Jelinek <[email protected]> + + PR target/50481 + * config/i386/i386-protos.h (ix86_expand_gfni_bitreverse): Declare. + * config/i386/i386-expand.cc (ix86_expand_gfni_bitreverse): New + function. + * config/i386/i386.md (bitreverse<mode>2): New expander. + +2026-05-18 H.J. Lu <[email protected]> + + PR target/125355 + * config/i386/i386-expand.cc (ix86_expand_movmem): Return false + for -Os. + 2026-05-17 Andrew Pinski <[email protected]> * tree-ssa-uncprop.cc (associate_equivalences_with_edges): For switches diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 7fa0e3eb50bf..2bdf77fcc72f 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20260518 +20260519 diff --git a/gcc/analyzer/ChangeLog b/gcc/analyzer/ChangeLog index 24ee876fce95..d4d08911edcc 100644 --- a/gcc/analyzer/ChangeLog +++ b/gcc/analyzer/ChangeLog @@ -1,3 +1,21 @@ +2026-05-18 David Malcolm <[email protected]> + + * analyzer.opt (-param=analyzer-bb-explosion-factor=): Rename to... + (-param=analyzer-supernode-explosion-factor=): ...this. + * engine.cc (exploded_graph::process_worklist): Update for change + to param name. Clarify the -Wanalyzer-too-complex message when + hitting the overall limit on enodes by also showing the number + of snodes. + +2026-05-18 David Malcolm <[email protected]> + + * engine.cc (exploded_node::status_to_str): Drop unused field + m_num_processed_stmts. + (exploded_node::dump): Likewise. + (exploded_node::to_json): Likewise. + * exploded-graph.h (exploded_node::m_num_processed_stmts): + Likewise. + 2026-05-06 David Malcolm <[email protected]> * svalue.cc (svalue::make_dump_widget): Show value ranges in diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index 03406ad148bb..dcb6881cc458 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,7 @@ +2026-05-18 Marek Polacek <[email protected]> + + * constexpr.cc (cxx_eval_bare_aggregate): Remove dead code. + 2026-05-15 Jakub Jelinek <[email protected]> PR c++/125081 diff --git a/gcc/jit/ChangeLog b/gcc/jit/ChangeLog index c3cd50b51655..0f4e21fdfa54 100644 --- a/gcc/jit/ChangeLog +++ b/gcc/jit/ChangeLog @@ -1,3 +1,10 @@ +2026-05-18 David Malcolm <[email protected]> + + * docs/topics/contexts.rst + (gcc_jit_context_add_command_line_option): Clarify that adding + multiple options requires multiple calls. + (gcc_jit_context_add_driver_option): Likewise. + 2025-12-11 Jakub Jelinek <[email protected]> * docs/_build/texinfo/libgccjit.texi: Fix comment typo, shold -> should. diff --git a/gcc/po/ChangeLog b/gcc/po/ChangeLog index 6e5a99ab0a2c..d219f1967467 100644 --- a/gcc/po/ChangeLog +++ b/gcc/po/ChangeLog @@ -1,3 +1,7 @@ +2026-05-18 Joseph Myers <[email protected]> + + * sv.po: Update. + 2026-05-05 Joseph Myers <[email protected]> * de.po: Update. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index adc34571c096..f75e2dfaf480 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,57 @@ +2026-05-18 Andrew Pinski <[email protected]> + + * gcc.dg/tree-ssa/pr112095.c: Add -Wno-psabi to the options. + Look at release_ssa instead of optimization. Match + "<retval> = a_" in addition to "return a_". + +2026-05-18 Xin Wang <[email protected]> + + * gcc.dg/tree-prof/loop-split-4.c: New test. + +2026-05-18 Wang Yaduo <[email protected]> + + * gcc.target/riscv/mcpu-xt-c9501fdvt.c: New test. + +2026-05-18 Jeff Law <[email protected]> + + * gcc.target/riscv/slt-1.c: Skip for -Oz as well. Set explicit branch + cost. + * gcc.target/riscv/zba-shNadd-04.c: Add Zbb to command line switches. + * gcc.target/riscv/zba-slliuw.c: Add Zbs to command line switches. + * gcc.target/riscv/zbs-zext.c: Add Zbs to command line switches. + * gcc.target/riscv/shift-shift-6.c: New test. + * gcc.target/riscv/shift-shift-7.c: New test. + * gcc.target/riscv/amo/a-rvwmo-load-relaxed.c: Accept lh or lhu. + * gcc.target/riscv/amo/a-ztso-load-relaxed.c: Accept lh or lhu. + * gcc.target/riscv/amo/zalasr-rvwmo-load-relaxed.c: Accept lh or lhu. + * gcc.target/riscv/amo/zalasr-ztso-load-relaxed.c: Accept lh or lhu. + * gcc.target/riscv/pr105314.c: Set explicitly branch cost. + * gcc.target/riscv/pr105314-rtl.c: Set explicitly branch cost. + +2026-05-18 Jeff Law <[email protected]> + + * gcc.target/riscv/ext-dce-2.c: New test. + +2026-05-18 David Malcolm <[email protected]> + + * c-c++-common/analyzer/fibonacci.c: Update for change in message + wording. + * c-c++-common/analyzer/raw-data-cst-pr117262-1.c: Update for + change in param name. + * gcc.dg/analyzer/explode-2a.c: Likewise. + * gcc.dg/analyzer/pr93032-mztools-signed-char.c: Likewise. + * gcc.dg/analyzer/pr93032-mztools-unsigned-char.c: Likewise. + +2026-05-18 Jakub Jelinek <[email protected]> + + PR target/50481 + * gcc.target/i386/gfni-builtin-bitreverse-1.c: New test. + +2026-05-18 H.J. Lu <[email protected]> + + PR target/125355 + * gcc.target/i386/pr125355.c: New test. + 2026-05-16 Jakub Jelinek <[email protected]> PR target/50481 diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index 8d88179ecab8..193418823b53 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,52 @@ +2026-05-18 Jonathan Wakely <[email protected]> + + * testsuite/23_containers/bitset/lwg4294.cc: Move to... + * testsuite/20_util/bitset/cons/lwg4294.cc: ...here. + +2026-05-18 Jonathan Wakely <[email protected]> + + * testsuite/25_algorithms/pstl/alg_sorting/minmax_element.cc: + Reduce iterations for debug mode. + +2026-05-18 Avi Kivity <[email protected]> + + PR libstdc++/121789 + * include/bits/stl_uninitialized.h (uninitialized_copy): + Unwrap move iterators + * testsuite/20_util/specialized_algorithms/uninitialized_move/121789.cc: + New test. + * testsuite/util/testsuite_greedy_ops.h (greedy_ops): Comment + out operator-(T, T). + +2026-05-18 Tomasz Kamiński <[email protected]> + + * include/std/valarray [__cplusplus >= 201103L]: Include + <bits/ranges_access.h>. + * testsuite/26_numerics/valarray/range_access2.cc: Remove + <iterator> include, and add test for std::size. + +2026-05-18 Tomasz Kamiński <[email protected]> + + * include/std/mdspan (layout_left_padded::is_exhaustive) + (layout_righ_padded::is_exhaustive): Mark as const. + * testsuite/23_containers/mdspan/layouts/mapping.cc: Test noexcept and + const-invocability for is_exhaustive, is_strided, and is_unique. + * testsuite/23_containers/mdspan/layouts/padded.cc: Test is_exhaustive on + const mapping.. + * testsuite/23_containers/mdspan/layouts/stride.cc: Likewise. + * testsuite/23_containers/mdspan/mdspan.cc: Checks const-invocability + for is_exhaustive, is_strided, is_unique. + +2026-05-18 Tomasz Kamiński <[email protected]> + + PR libstdc++/124852 + * src/c++20/tzdb.cc (on_month_day::on_day_t, on_month_day::on_day): + Remove. + (operator>>(istream&, on_month_day::day_t&)): Inlined into... + (operator>>(istream&, on_month_day)): Inlined on_month_day::on_day. + Avoid modifying on.month if MONTH is not present. Report failure + on failure to parse day for LessEq / GreaterEq. + 2026-05-16 Dragon Archer <[email protected]> PR libstdc++/125228
