https://gcc.gnu.org/g:198c9262a2c3dcfc28af73f125ff4f0e179cb65a
commit r17-1149-g198c9262a2c3dcfc28af73f125ff4f0e179cb65a Author: GCC Administrator <[email protected]> Date: Tue Jun 2 00:16:46 2026 +0000 Daily bump. Diff: --- gcc/ChangeLog | 811 ++++++++++++++++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/c-family/ChangeLog | 10 + gcc/cp/ChangeLog | 17 + gcc/fortran/ChangeLog | 27 ++ gcc/rust/ChangeLog | 132 +++++++ gcc/testsuite/ChangeLog | 162 ++++++++ include/ChangeLog | 5 + libatomic/ChangeLog | 5 + libgcc/ChangeLog | 40 ++ libgcc/config/avr/libf7/ChangeLog | 6 + libgm2/ChangeLog | 4 + libgomp/ChangeLog | 146 +++++++ libiberty/ChangeLog | 4 + libitm/ChangeLog | 4 + libstdc++-v3/ChangeLog | 10 + 16 files changed, 1384 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 242ef68af5ea..e0da7046f84b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,814 @@ +2026-06-01 Kyrylo Tkachov <[email protected]> + + PR target/122827 + * config/aarch64/aarch64.cc (aarch64_hard_regno_call_part_clobbered): + For SVE modes use BYTES_PER_SVE_VECTOR for the per-register size + rather than GET_MODE_SIZE. + * config/aarch64/aarch64-early-ra.cc (early_ra::get_allocno_subgroup): + Classify any SVE mode as FPR_Z. + +2026-06-01 Kyrylo Tkachov <[email protected]> + + * config/aarch64/tuning_models/olympus.h (olympus_scalar_issue_info, + olympus_advsimd_issue_info, olympus_sve_issue_info): Set + loads_stores_per_cycle to 6. + +2026-06-01 Kyrylo Tkachov <[email protected]> + + * config/aarch64/tuning_models/olympus.h (olympus_tunings): + Adjust loop_align, function_align, jump_align. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/arm/arm-mve-builtins-shapes.cc (struct viddup_def): + Re-flow comment. + (struct vidwdup_def): Likewise. + * config/arm/arm.cc (arm_mve_check_reg_origin_is_num_elems): Likewise. + * config/loongarch/sync.md: Likewise. + * config/microblaze/microblaze.cc (compute_frame_size): Likewise. + * config/rs6000/rs6000-call.cc (rs6000_gimplify_va_arg): Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/darwin-c.cc (find_subframework_header): Fix typos. + * config/darwin-driver.cc (darwin_find_version_from_kernel): Likewise. + * config/darwin.cc (darwin_label_is_anonymous_local_objc_name): Likewise. + (fprintf): Likewise. + * config/sol2-stubs.cc: Likewise. + * config/sol2.cc (solaris_elf_asm_comdat_section): Likewise. + * config/sol2.h: Likewise. + * config/vx-common.h: Likewise. + * config/vxworks.h (vxworks_asm_out_destructor): Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/xtensa/xtensa.cc (xtensa_legitimize_address): Fix typos. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/vms/vms-c.cc (enum extern_model_kind): Fix typos. + (vms_pragma_message): Likewise. + (vms_c_register_includes): Likewise. + * config/vms/vms.cc (vms_function_section): Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/visium/visium.h (CASE_VECTOR_PC_RELATIVE): Fix typos. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/vax/vax.cc (vax_expand_addsub_di_operands): Fix typos. + * config/vax/vax.h (PRINT_OPERAND_ADDRESS): Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/sparc/freebsd.h: Fix typos. + * config/sparc/sparc.cc (emit_scc_insn): Likewise. + (sparc_emit_membar_for_model): Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/sh/sh-mem.cc (sh_expand_cmpstr): Fix typos. + * config/sh/sh.cc (sh_option_override): Likewise. + (sh_rtx_costs): Likewise. + (fixup_addr_diff_vecs): Likewise. + (sh_expand_epilogue): Likewise. + (sh_legitimize_address_displacement): Likewise. + (sh_can_use_simple_return_p): Likewise. + (sh_find_equiv_gbr_addr): Likewise. + (sh_check_add_incdec_notes): Likewise. + * config/sh/sh.md: Likewise. + * config/sh/sh4-300.md: Likewise. + * config/sh/sh_treg_combine.cc (sh_treg_combine::try_combine_comparisons): Likewise. + (sh_treg_combine::try_eliminate_cstores): Likewise. + * config/sh/sync.md: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/rx/rx.cc (rx_print_operand): Fix typos. + (rx_expand_epilogue): Likewise. + * config/rx/rx.md: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/s390/2817.md: Fix typos. + * config/s390/s390.cc (s390_contiguous_bitmask_nowrap_p): Likewise. + (s390_contiguous_bitmask_p): Likewise. + (s390_short_displacement): Likewise. + (s390_expand_cmpmem): Likewise. + (s390_expand_vec_movstr): Likewise. + (s390_expand_cstoreti4): Likewise. + (s390_expand_int_spaceship): Likewise. + (s390_z10_optimize_cmp): Likewise. + (s390_support_vector_misalignment): Likewise. + * config/s390/s390.h (NO_FUNCTION_CSE): Likewise. + * config/s390/s390.md: Likewise. + * config/s390/subst.md: Likewise. + * config/s390/vx-builtins.md: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/rs6000/aix.h: Fix typos. + * config/rs6000/cell.md: Likewise. + * config/rs6000/darwin.h: Likewise. + * config/rs6000/mmintrin.h: Likewise. + * config/rs6000/rs6000-call.cc (rs6000_gimplify_va_arg): Likewise. + * config/rs6000/rs6000-internal.h: Likewise. + * config/rs6000/rs6000-logue.cc (is_altivec_return_reg): Likewise. + (rs6000_output_function_prologue): Likewise. + * config/rs6000/rs6000-p8swap.cc (quad_aligned_store_p): Likewise. + (const_load_sequence_p): Likewise. + (replace_swapped_aligned_store): Likewise. + * config/rs6000/rs6000-passes.def: Likewise. + * config/rs6000/rs6000-string.cc (expand_cmp_vec_sequence): Likewise. + (expand_compare_loop): Likewise. + * config/rs6000/rs6000.cc (rs6000_debug_addr_mask): Likewise. + (rs6000_setup_reg_addr_masks): Likewise. + (darwin_rs6000_override_options): Likewise. + (rs6000_option_override_internal): Likewise. + (rs6000_cost_data::determine_suggested_unroll_factor): Likewise. + (rs6000_cannot_force_const_mem): Likewise. + (rs6000_emit_le_vsx_move): Likewise. + (rs6000_secondary_reload_memory): Likewise. + (rs6000_reverse_condition): Likewise. + (rs6000_expand_float128_convert): Likewise. + (rs6000_adjust_atomic_subword): Likewise. + (rs6000_expand_atomic_op): Likewise. + (rs6000_xcoff_declare_object_name): Likewise. + (output_pcrel_opt_reloc): Likewise. + (rs6000_set_up_by_prologue): Likewise. + (rs6000_split_logical_inner): Likewise. + (rs6000_split_multireg_move): Likewise. + * config/rs6000/rs6000.h: Likewise. + * config/rs6000/rs6000.md: Likewise. + * config/rs6000/sync.md: Likewise. + * config/rs6000/vector.md: Likewise. + * config/rs6000/vsx.md: Likewise. + * config/rs6000/vxworks.h: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/rl78/rl78.cc (rl78_alloc_physical_registers): Fix typos. + (set_origin): Likewise. + (rl78_remove_unused_sets): Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/pdp11/pdp11.cc (pdp11_insn_cost): Fix typo. + +2026-06-01 Dhruv Chawla <[email protected]> + + * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Fix + typos. + (riscv_subset_list::parse_single_multiletter_ext): Likewise. + (riscv_subset_list::set_loc): Likewise. + (riscv_arch_str): Likewise. + * config/riscv/riscv-avlprop.cc: Likewise. + * config/riscv/riscv-bclr-lowest-set-bit.cc (find_later_ctz): Likewise. + * config/riscv/riscv-ext-andes.def: Likewise. + * config/riscv/riscv-ext.def: Likewise. + * config/riscv/riscv-profiles.def: Likewise. + * config/riscv/riscv-selftests.cc (run_const_vector_selftests): Likewise. + (run_broadcast_selftests): Likewise. + (riscv_run_selftests): Likewise. + * config/riscv/riscv-string.cc (riscv_expand_strcmp): Likewise. + * config/riscv/riscv-v.cc (shuffle_decompress_patterns): Likewise. + (vls_mode_valid_p): Likewise. + * config/riscv/riscv-vect-permconst.cc (vector_permconst::process_bb): Likewise. + * config/riscv/riscv-vector-builtins.cc (riscv_pragma_intrinsic_flags_pollute): Likewise. + * config/riscv/riscv-vsetvl.cc: Likewise. + * config/riscv/riscv-zicfilp.cc: Likewise. + * config/riscv/riscv.cc (riscv_expand_mult_with_const_int): Likewise. + (riscv_rtx_costs): Likewise. + (riscv_address_cost): Likewise. + (riscv_vls_cc_function_abi): Likewise. + (riscv_frm_mode_needed): Likewise. + (dispatch_function_versions): Likewise. + * config/riscv/riscv.h (DWARF_REG_TO_UNWIND_COLUMN): Likewise. + * config/riscv/riscv.md: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/pa/pa.cc (pa_assemble_integer): Fix typos. + (pa_can_change_mode_class): Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/or1k/or1k.cc (or1k_strict_argument_naming): Fix typos. + (or1k_print_operand_address): Likewise. + * config/or1k/or1k.md: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/nvptx/nvptx.cc (nvptx_option_override): Fix typos. + (nvptx_assemble_undefined_decl): Likewise. + (nvptx_mem_maybe_shared_p): Likewise. + (nvptx_discover_pars): Likewise. + (verify_neutering_labels): Likewise. + (nvptx_condjump_label): Likewise. + (nvptx_lockfull_update): Likewise. + * config/nvptx/nvptx.md: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * common/config/nds32/nds32-common.cc (nds32_except_unwind_info): Fix + typos. + * config/nds32/constants.md: Likewise. + * config/nds32/constraints.md: Likewise. + * config/nds32/nds32-cost.cc (nds32_rtx_costs_speed_prefer): Likewise. + * config/nds32/nds32-dspext.md: Likewise. + * config/nds32/nds32-e8.md: Likewise. + * config/nds32/nds32-fp-as-gp.cc (nds32_fp_as_gp_check_available): Likewise. + * config/nds32/nds32-intrinsic.cc (nds32_expand_priority_builtin): Likewise. + * config/nds32/nds32-isr.cc (nds32_emit_isr_vector_section): Likewise. + (nds32_asm_file_end_for_isr): Likewise. + * config/nds32/nds32-md-auxiliary.cc (output_cond_branch): Likewise. + (nds32_expand_cbranch): Likewise. + (nds32_expand_float_cstore): Likewise. + (nds32_expand_movcc): Likewise. + (nds32_output_stack_pop): Likewise. + (nds32_output_return): Likewise. + (nds32_split_sms): Likewise. + (nds32_legitimize_tls_address): Likewise. + * config/nds32/nds32-memory-manipulation.cc (nds32_expand_cpymemsi_unroll): Likewise. + (nds32_expand_load_multiple): Likewise. + * config/nds32/nds32-multiple.md: Likewise. + * config/nds32/nds32-n7.md: Likewise. + * config/nds32/nds32-n8.md: Likewise. + * config/nds32/nds32-n9-2r1w.md: Likewise. + * config/nds32/nds32-pipelines-auxiliary.cc (extract_nth_access_reg): Likewise. + (pbsada_insn_ra_rb_dep_reg_p): Likewise. + * config/nds32/nds32-predicates.cc (nds32_can_use_bset_p): Likewise. + (nds32_can_use_btgl_p): Likewise. + (nds32_symbol_load_store_p): Likewise. + * config/nds32/nds32-protos.h (nds32_cond_move_p): Likewise. + (nds32_mem_format): Likewise. + * config/nds32/nds32-relax-opt.cc (nds32_plus_reg_load_store_p): Likewise. + * config/nds32/nds32-utils.cc (extract_offset_rtx): Likewise. + * config/nds32/nds32.cc (nds32_compute_stack_frame): Likewise. + (nds32_emit_stack_pop_multiple): Likewise. + (nds32_emit_stack_v3pop): Likewise. + (nds32_can_change_mode_class): Likewise. + (nds32_arg_partial_bytes): Likewise. + (nds32_function_ok_for_sibcall): Likewise. + (nds32_register_move_cost): Likewise. + (nds32_print_operand): Likewise. + (nds32_merge_decl_attributes): Likewise. + (nds32_insert_attributes): Likewise. + (nds32_init_libfuncs): Likewise. + (nds32_expand_epilogue_v3pop): Likewise. + (nds32_can_use_return_insn): Likewise. + (nds32_target_alignment): Likewise. + (nds32_split_double_word_load_store_p): Likewise. + * config/nds32/nds32.h (enum nds32_builtins): Likewise. + (CASE_VECTOR_MODE): Likewise. + * config/nds32/nds32.md: Likewise. + * config/nds32/nds32_intrinsic.h (__attribute__): Likewise. + * config/nds32/nds32_isr.h: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/msp430/msp430-opts.h (enum msp430_cpu_types): Fix typos. + * config/msp430/msp430.cc (msp430_op_not_in_high_mem): Likewise. + * config/msp430/msp430.md: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/mingw/winnt-cxx.cc (i386_pe_adjust_class_at_definition): Fix + typos. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/microblaze/microblaze.cc (struct microblaze_frame_info): Fix + typos. + (compute_frame_size): Likewise. + * config/microblaze/microblaze.h: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/mcore/mcore.h: Fix typo. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/mips/driver-native.cc (host_detect_local_cpu): Fix typos. + * config/mips/mips-cpus.def (MIPS_CPU): Likewise. + * config/mips/mips.cc (mips_setup_incoming_varargs): Likewise. + (mips_function_ok_for_sibcall): Likewise. + (mips_expand_ext_as_unaligned_load): Likewise. + (mips_use_ins_ext_p): Likewise. + (mips_pop_asm_switch): Likewise. + (mips_cfun_has_inflexible_gp_ref_p): Likewise. + (mips_set_compression_mode): Likewise. + (mips_expand_vec_unpack): Likewise. + * config/mips/mips.h (while): Likewise. + * config/mips/mips.md: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/m68k/cf.md: Fix typos. + * config/m68k/m68k.cc (m68k_unwrap_symbol): Likewise. + (m68k_adjust_decorated_operand): Likewise. + (m68k_call_tls_get_addr): Likewise. + (m68k_call_m68k_read_tp): Likewise. + (m68k_sched_attr_size): Likewise. + (m68k_sched_dfa_post_advance_cycle): Likewise. + (sched_mem_operand_p): Likewise. + (m68k_sched_address_bypass_p): Likewise. + * config/m68k/m68kelf.h: Likewise. + * config/m68k/netbsd-elf.h (REGISTER_PREFIX): Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/loongarch/lasx.md: Fix typos. + * config/loongarch/loongarch-builtins.cc: Likewise. + * config/loongarch/loongarch-c.cc (loongarch_pragma_target_parse): Likewise. + * config/loongarch/loongarch-opts.cc (loongarch_generate_mrecip_scheme): Likewise. + * config/loongarch/loongarch-opts.h (loongarch_config_target): Likewise. + * config/loongarch/loongarch.cc (loongarch_setup_incoming_varargs): Likewise. + (loongarch_build_integer): Likewise. + (loongarch_explicit_relocs_p): Likewise. + (loongarch_valid_lo_sum_p): Likewise. + (loongarch_addu16i_imm12_operand_p): Likewise. + (loongarch_rewrite_mem_for_simple_ldst): Likewise. + (loongarch_is_elem_duplicate): Likewise. + (loongarch_expand_vec_perm_const): Likewise. + (loongarch_sched_reassociation_width): Likewise. + (loongarch_expand_vec_unpack): Likewise. + (dispatch_function_versions): Likewise. + (loongarch_option_same_function_versions): Likewise. + * config/loongarch/loongarch.h: Likewise. + * config/loongarch/loongarch.md: Likewise. + * config/loongarch/lsx.md: Likewise. + * config/loongarch/predicates.md: Likewise. + * config/loongarch/simd.md: Likewise. + * config/loongarch/sync.md: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/lm32/lm32.cc (lm32_compute_frame_size): Fix typos. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/ia64/ia64.cc (ia64_add_bundle_selector_before): Fix typos. + * config/ia64/itanium2.md: Likewise. + * config/ia64/sync.md: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/i386/athlon.md: Fix typos. + * config/i386/avx512fintrin.h: Likewise. + * config/i386/btver2.md: Likewise. + * config/i386/c86-4g-m7.md: Likewise. + * config/i386/c86-4g.md: Likewise. + * config/i386/cygwin.h: Likewise. + * config/i386/i386-c.cc (ix86_target_macros_internal): Likewise. + * config/i386/i386-expand.cc (ix86_expand_branch): Likewise. + (ix86_expand_int_sse_cmp): Likewise. + (ix86_expand_vec_perm): Likewise. + (expand_small_cpymem_or_setmem): Likewise. + (ix86_copy_addr_to_reg): Likewise. + (ix86_expand_special_args_builtin): Likewise. + (ix86_expand_vector_init_interleave): Likewise. + (expand_vec_perm_shufps_shufps): Likewise. + (ix86_expand_sse2_mulvxdi3): Likewise. + (ix86_gen_ccmp_first): Likewise. + * config/i386/i386-features.cc (general_scalar_to_vector_candidate_p): Likewise. + (pass_x86_cse::x86_cse): Likewise. + (ix86_apx_nf_convert): Likewise. + (dispatch_function_versions): Likewise. + * config/i386/i386-features.h (class scalar_chain): Likewise. + * config/i386/i386-options.cc (ix86_function_specific_restore): Likewise. + (ix86_valid_target_attribute_tree): Likewise. + (ix86_override_options_after_change_1): Likewise. + (ix86_option_override_internal): Likewise. + * config/i386/i386.cc (ix86_can_inline_p): Likewise. + (ix86_function_regparm): Likewise. + (construct_container): Likewise. + (ix86_return_in_memory): Likewise. + (output_indirect_thunk): Likewise. + (ix86_compute_frame_layout): Likewise. + (choose_basereg): Likewise. + (ix86_emit_save_reg_using_mov): Likewise. + (pro_epilogue_adjust_stack): Likewise. + (ix86_expand_prologue): Likewise. + (ix86_emit_restore_sse_regs_using_mov): Likewise. + (ix86_memory_address_reg_class): Likewise. + (ix86_avx_u128_mode_after): Likewise. + (ix86_output_addr_diff_elt): Likewise. + (ix86_lea_outperforms): Likewise. + (ix86_avoid_lea_for_addr): Likewise. + (ix86_cc_modes_compatible): Likewise. + (add_parameter_dependencies): Likewise. + (ix86_data_alignment): Likewise. + (ix86_gimple_fold_builtin): Likewise. + (ix86_autovectorize_vector_modes): Likewise. + (ix86_max_noce_ifcvt_seq_cost): Likewise. + (ix86_vector_costs::add_stmt_cost): Likewise. + (ix86_vector_costs::finish_cost): Likewise. + (ix86_optab_supported_p): Likewise. + (ix86_push_rounding): Likewise. + * config/i386/i386.h (host_detect_local_cpu): Likewise. + (enum reg_class): Likewise. + * config/i386/i386.md: Likewise. + * config/i386/i386elf.h: Likewise. + * config/i386/predicates.md: Likewise. + * config/i386/sse.md: Likewise. + * config/i386/x86-tune-costs.h (struct processor_costs): Likewise. + * config/i386/x86-tune-sched-atom.cc (swap_top_of_ready_list): Likewise. + (ix86_atom_sched_reorder): Likewise. + * config/i386/x86-tune-sched-bd.cc (find_constant): Likewise. + * config/i386/x86-tune-sched.cc (exact_store_load_dependency): Likewise. + * config/i386/x86-tune.def (X86_TUNE_FUSE_MOV_AND_ALU): Likewise. + (X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB): Likewise. + (X86_TUNE_DOUBLE_WITH_ADD): Likewise. + (X86_TUNE_PROMOTE_QIMODE): Likewise. + * config/i386/zn4zn5.md: Likewise. + * config/i386/znver.md: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/gcn/constraints.md: Fix typos. + * config/gcn/gcn-opts.h (TARGET_ARCHITECTED_FLAT_SCRATCH): Likewise. + * config/gcn/gcn-valu.md: Likewise. + * config/gcn/gcn.cc (gcn_gen_undef): Likewise. + (gcn_addr_space_debug): Likewise. + (gcn_expand_prologue): Likewise. + (gcn_frame_pointer_rqd): Likewise. + * config/gcn/gcn.h (NUM_PARM_REGS): Likewise. + (enum gcn_builtin_codes): Likewise. + * config/gcn/gcn.md: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/ft32/ft32.cc (ft32_init_machine_status): Fix typos. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/frv/frv-opts.h: Fix typos. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/fr30/fr30.cc (fr30_const_double_is_zero): Fix typos. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/epiphany/epiphany.cc (epiphany_expand_epilogue): Fix typos. + * config/epiphany/resolve-sw-modes.cc: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/csky/csky.cc (csky_output_inline_const): Fix typos. + (emit_csky_regs_pop): Likewise. + (csky_return_in_memory): Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/c6x/c6x.cc (c6x_file_start): Fix typos. + (c6x_print_operand_address): Likewise. + (c6x_asm_emit_except_personality): Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/bpf/bpf.cc (bpf_asm_named_section): Fix typos. + * config/bpf/core-builtins.cc (remove_parser_plugin): Likewise. + (make_core_relo): Likewise. + (bpf_handle_plugin_finish_type): Likewise. + (bpf_output_core_reloc): Likewise. + (core_make_builtins): Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/bfin/bfin.cc (bfin_function_ok_for_sibcall): Fix typos. + +2026-06-01 Dhruv Chawla <[email protected]> + + * common/config/avr/avr-common.cc: Fix typos. + * config/avr/avr-passes.cc (size_to_mode): Likewise. + (struct absint_t): Likewise. + (plies_t::emit_sets): Likewise. + (avr_strict_unsigned_p): Likewise. + (avr_redundant_compare): Likewise. + (avr_optimize_casesi): Likewise. + (struct AVR_LdSt_Props): Likewise. + (avr_pass_split_nzb::split_nzb_insns): Likewise. + (make_avr_pass_fuse_move): Likewise. + * config/avr/avr.cc (avr_option_override): Likewise. + (avr_can_inline_p): Likewise. + (avr_expand_epilogue): Likewise. + (avr_init_cumulative_args): Likewise. + (reg_unused_after): Likewise. + (avr_out_lpm_no_lpmx): Likewise. + (avr_out_compare): Likewise. + (avr_out_plus_ext): Likewise. + (avr_out_fract): Likewise. + (avr_nonzero_bits_lsr_operands_p): Likewise. + * config/avr/avr.h (avr_no_devlib): Likewise. + (struct machine_function): Likewise. + * config/avr/avr.md: Likewise. + * config/avr/builtins.def (FLASH_SEGMENT): Likewise. + * config/avr/specs.h: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * common/config/arm/arm-common.cc (arm_config_default): Fix typos. + (arm_canon_arch_option_1): Likewise. + * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Likewise. + * config/arm/arm-builtins.cc (MAC_LANE_PAIR_QUALIFIERS): Likewise. + (USMAC_LANE_QUADTUP_QUALIFIERS): Likewise. + * config/arm/arm-modes.def (ADJUST_FLOAT_FORMAT): Likewise. + * config/arm/arm-mve-builtins-base.cc: Likewise. + * config/arm/arm-mve-builtins-shapes.cc (struct binary_lshift_unsigned_def): Likewise. + (struct binary_maxamina_def): Likewise. + (struct viddup_def): Likewise. + (struct vidwdup_def): Likewise. + * config/arm/arm-protos.h (struct tune_params): Likewise. + * config/arm/arm.cc (arm_option_override_internal): Likewise. + (arm_option_override): Likewise. + (optimal_immediate_sequence_1): Likewise. + (arm_pcs_from_attribute): Likewise. + (aapcs_vfp_advance): Likewise. + (aapcs_layout_arg): Likewise. + (arm_init_cumulative_args): Likewise. + (arm_rtx_costs_internal): Likewise. + (mve_bool_vec_to_const): Likewise. + (operands_ok_ldrd_strd): Likewise. + (emit_multi_reg_push): Likewise. + (arm_emit_vfp_multi_reg_pop): Likewise. + (thumb2_emit_ldrd_pop): Likewise. + (arm_print_condition): Likewise. + (get_arm_condition_code): Likewise. + (thumb_pop): Likewise. + (arm_print_asm_arch_directives): Likewise. + (arm_debugger_regno): Likewise. + (arm_target_bb_ok_for_lob): Likewise. + (arm_mve_load_store_insn_p): Likewise. + (arm_mve_check_reg_origin_is_num_elems): Likewise. + (arm_mve_dlstp_check_dec_counter): Likewise. + (arm_mve_loop_valid_for_dlstp): Likewise. + (arm_loop_unroll_adjust): Likewise. + * config/arm/arm.h (ROUND_UP_WORD): Likewise. + * config/arm/arm.md: Likewise. + * config/arm/constraints.md: Likewise. + * config/arm/cortex-a17-neon.md: Likewise. + * config/arm/cortex-r4f.md: Likewise. + * config/arm/crypto.md: Likewise. + * config/arm/elf.h: Likewise. + * config/arm/fa726te.md: Likewise. + * config/arm/iterators.md: Likewise. + * config/arm/neon.md: Likewise. + * config/arm/thumb1.md: Likewise. + * config/arm/uclinuxfdpiceabi.h: Likewise. + * config/arm/unspecs.md: Likewise. + * config/arm/vec-common.md: Likewise. + * config/arm/vxworks.h (STACK_CHECK_PROTECT): Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/arc/arc-arch.h (enum base_architecture): Fix typos. + * config/arc/arc-cpus.def: Likewise. + * config/arc/arc.cc (legitimate_small_data_address_p): Likewise. + (legitimate_scaled_address_p): Likewise. + (get_arc_condition_code): Likewise. + (arc_setup_incoming_varargs): Likewise. + (pop_reg): Likewise. + (arc_restore_callee_leave): Likewise. + (arc_asm_trampoline_template): Likewise. + (arc_add_jli_section): Likewise. + (arc_invalid_within_doloop): Likewise. + (arc_reorg): Likewise. + (conditionalize_nonjump): Likewise. + (arc_eh_uses): Likewise. + (arc_memory_move_cost): Likewise. + * config/arc/arc.h (TARGET_CPU_CPP_BUILTINS): Likewise. + (TARGET_PAD_RETURN): Likewise. + (arc_select_cc_mode): Likewise. + * config/arc/arc.md: Likewise. + * config/arc/arc.opt: Likewise. + * config/arc/arc700.md: Likewise. + * config/arc/elf.h (TARGET_ASM_FILE_END): Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/alpha/alpha.cc (alpha_pass_by_reference): Fix typos. + (alpha_reorg): Likewise. + * config/alpha/predicates.md: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * common/config/aarch64/aarch64-common.cc (aarch64_parse_cpu): Fix + typos. + * common/config/aarch64/cpuinfo.h: Likewise. + * config/aarch64/aarch64-builtins.cc: Likewise. + * config/aarch64/aarch64-c.cc (aarch64_pragma_target_parse): Likewise. + * config/aarch64/aarch64-modes.def (FLOAT_MODE): Likewise. + * config/aarch64/aarch64-simd.md: Likewise. + * config/aarch64/aarch64-speculation.cc: Likewise. + * config/aarch64/aarch64-sve-builtins-functions.h: Likewise. + * config/aarch64/aarch64-sve-builtins-shapes.cc (struct binary_za_m_def): Likewise. + * config/aarch64/aarch64-sve-builtins.cc (function_builder::add_function): Likewise. + * config/aarch64/aarch64-sve.md: Likewise. + * config/aarch64/aarch64-sve2.md: Likewise. + * config/aarch64/aarch64.cc (aarch64_init_sysregs): Likewise. + (aarch64_load_symref_appropriately): Likewise. + (aarch64_output_sve_cnt_immediate): Likewise. + (aarch64_replace_reg_mode): Likewise. + (aarch64_pass_by_reference_1): Likewise. + (aarch64_layout_arg): Likewise. + (aarch64_allocate_and_probe_stack_space): Likewise. + (aarch64_legitimize_address_displacement): Likewise. + (aarch64_output_casesi): Likewise. + (aarch64_stp_sequence_cost): Likewise. + (aarch64_vector_costs::add_stmt_cost): Likewise. + (aarch64_override_options): Likewise. + (aarch64_functions_b_resolvable_from_a): Likewise. + (dispatch_function_versions): Likewise. + (aarch64_can_inline_p): Likewise. + (aarch64_classify_symbol): Likewise. + (aarch64_build_builtin_va_list): Likewise. + (aarch64_sve_pred_valid_immediate): Likewise. + (aarch64_simd_lane_bounds): Likewise. + (aarch64_expand_vector_init_fallback): Likewise. + (aarch64_modes_compatible_p): Likewise. + (aarch64_ldrstr_offset_compare): Likewise. + (aarch64_speculation_safe_value): Likewise. + * config/aarch64/aarch64.h (DEFAULT_PCC_STRUCT_RETURN): Likewise. + (struct GTY): Likewise. + * config/aarch64/aarch64.md: Likewise. + * config/aarch64/aarch64.opt: Likewise. + * config/aarch64/arm_bf16.h: Likewise. + * config/aarch64/arm_neon.h (vbslq_u64): Likewise. + * config/aarch64/cortex-a57-fma-steering.cc: Likewise. + * config/aarch64/driver-aarch64.cc (get_cpu_from_id): Likewise. + (host_detect_local_cpu): Likewise. + * config/aarch64/iterators.md: Likewise. + * config/aarch64/thunderx.md: Likewise. + * config/aarch64/thunderx3t110.md: Likewise. + +2026-06-01 Jakub Jelinek <[email protected]> + + * configure: Regenerate. + +2026-06-01 Hongyu Wang <[email protected]> + + * config/i386/i386.h (TARGET_ENABLE_NDD_MEM): New. + * config/i386/x86-tune.def (X86_TUNE_ENABLE_NDD_MEM): New. + * config/i386/i386.md (*add<dwi>3_doubleword): Split NDD rm + to r,m and add preferred_for_speed for NDD memory alternatives. + (*add<dwi>3_doubleword_zext): Likewise. + (*add<mode>_1<nf_name>): Likewise. + (addsi_1_zext): Likewise. + (*addhi_1<nf_name>): Likewise. + (*addqi_1<nf_name>): Likewise. + (*add<mode>_2): Likewise. + (*addsi_2_zext): Likewise. + (*add<mode>_3): Likewise. + (*addsi_3_zext): Likewise. + (*add<mode>_5): Likewise. + (*addv<mode>4): Likewise. + (addv<mode>4_1): Likewise. + (*addv<dwi>4_doubleword_1): Likewise. + (*addv<mode>4_overflow_1): Likewise. + (*addv<mode>4_overflow_2): Likewise. + (*sub<dwi>3_doubleword): Likewise. + (*sub<dwi>3_doubleword_zext): Likewise. + (*sub<mode>_1<nf_name>): Likewise. + (*subsi_1_zext): Likewise. + (*sub<mode>_2): Likewise. + (*subsi_2_zext): Likewise. + (*subv<mode>4): Likewise. + (subv<mode>4_1): Likewise. + (*subv<dwi>4_doubleword_1): Likewise. + (*subv<mode>4_overflow_1): Likewise. + (*subv<mode>4_overflow_2): Likewise. + (*sub<mode>_3): Likewise. + (*subsi_3_zext): Likewise. + (@add<mode>3_carry): Likewise. + (*add<mode>3_carry_2): Likewise. + (*addsi3_carry_zext): Likewise. + (*addsi3_carry_zext_0): Likewise. + (*addsi3_carry_zext_0r): Likewise. + (addcarry<mode>): Likewise. + (*addcarry<mode>_1): Likewise. + (@sub<mode>3_carry): Likewise. + (*sub<mode>3_carry_2): Likewise. + (*subsi3_carry_zext): Likewise. + (*subsi3_carry_zext_0): Likewise. + (*subsi3_carry_zext_0r): Likewise. + (subborrow<mode>): Likewise. + (*subborrow<mode>_1): Likewise. + (*add<mode>3_cconly_overflow_1): Likewise. + (@add<mode>3_cc_overflow_1): Likewise. + (*addsi3_zext_cc_overflow_1): Likewise. + (*add<mode>3_cconly_overflow_2): Likewise. + (*add<mode>3_cc_overflow_2): Likewise. + (*addsi3_zext_cc_overflow_2): Likewise. + (*mul<mode>3_1<nf_name>): Likewise. + (*mulsi3_1_zext<nf_name>): Likewise. + (*mulv<mode>4): Likewise. + (*mulvhi4): Likewise. + (*and<dwi>3_doubleword): Likewise. + (*anddi_1<nf_name>): Likewise. + (*andsi_1_zext): Likewise. + (*andqi_1<nf_name>): Likewise. + (*anddi_2): Likewise. + (*andsi_2_zext): Likewise. + (*andqi_2_maybe_si): Likewise. + (*and<mode>_2): Likewise. + (*<code><dwi>3_doubleword): Likewise. + (*<code><mode>_1<nf_name>): Likewise. + (*notxor<mode>_1): Likewise. + (*<code>si_1_zext): Likewise. + (*<code>si_1_zext_imm): Likewise. + (*<code>qi_1<nf_name>): Likewise. + (*notxorqi_1): Likewise. + (*<code><mode>_2): Likewise. + (*<code>si_2_zext): Likewise. + (*<code>si_2_zext_imm): Likewise. + (*neg<dwi>2_doubleword): Likewise. + (*neg<mode>_1<nf_name>): Likewise. + (*negsi_1_zext): Likewise. + (*neg<mode>_2): Likewise. + (*negsi_2_zext): Likewise. + (*neg<mode>_ccc_1): Likewise. + (*neg<mode>_ccc_2): Likewise. + (*one_cmpl<dwi>2_doubleword): Likewise. + (*one_cmpl<mode>2_1): Likewise. + (*one_cmplsi2_1_zext): Likewise. + (*one_cmplqi2_1): Likewise. + (*one_cmpl<mode>2_2): Likewise. + (*one_cmplsi2_2_zext): Likewise. + (*ashl<dwi>3_doubleword_highpart): Likewise. + (*ashl<mode>3_1<nf_name>): Likewise. + (*ashlsi3_1_zext): Likewise. + (*ashlhi3_1<nf_name>): Likewise. + (*ashlqi3_1<nf_name>): Likewise. + (*ashl<mode>3_cmp): Likewise. + (*ashlsi3_cmp_zext): Likewise. + (*ashl<mode>3_cconly): Likewise. + (ashr<mode>3_cvt<nf_name>): Likewise. + (*ashrsi3_cvt_zext): Likewise. + (*ashr<mode>3_1<nf_name>): Likewise. + (*highpartdisi2): Likewise. + (*lshr<mode>3_1<nf_name>): Likewise. + (*<insn>si3_1_zext): Likewise. + (*lshrqi3_1<nf_name>): Likewise. + (*lshrhi3_1<nf_name>): Likewise. + (*<insn><mode>3_cmp): Likewise. + (*<insn>si3_cmp_zext): Likewise. + (*<insn><mode>3_cconly): Likewise. + (*<insn><mode>3_1<nf_name>): Likewise. + (*<insn>si3_1_zext): Likewise. + (rcrsi2): Likewise. + (rcrdi2): Likewise. + (<insn><mode>3_carry): Likewise. + (*mov<mode>cc_noc): Likewise. + (*movsicc_noc_zext): Likewise. + (*movsicc_noc_zext_1): Likewise. + (*addqi3_carry_zext<mode>_0): Likewise. + (*addhi3_carry_zext<mode>_0): Likewise. + (*addqi3_carry_zext<mode>_0r): Likewise. + (*addhi3_carry_zext<mode>_0r): Likewise. + (*subqi3_carry_zext<mode>_0): Likewise. + (*subhi3_carry_zext<mode>_0): Likewise. + (*subqi3_carry_zext<mode>_0r): Likewise. + (*subhi3_carry_zext<mode>_0r): Likewise. + (*negqi_1_zext<mode><nf_name>): Likewise. + (*neghi_1_zext<mode><nf_name>): Likewise. + (*one_cmplqi2_1_zext<mode>): Likewise. + (*one_cmplhi2_1_zext<mode>): Likewise. + (x86_64_shld_ndd<nf_name>): Likewise. + (x86_64_shld_ndd_1<nf_name>): Likewise. + (x86_shld_ndd<nf_name>): Likewise. + (x86_shld_ndd_1<nf_name>): Likewise. + (*ashlqi3_1_zext<mode><nf_name>): Likewise. + (*ashlhi3_1_zext<mode><nf_name>): Likewise. + (x86_64_shrd_ndd<nf_name>): Likewise. + (x86_64_shrd_ndd_1<nf_name>): Likewise. + (x86_shrd_ndd<nf_name>): Likewise. + (x86_shrd_ndd_1<nf_name>): Likewise. + (*<insn>qi3_1_zext<mode><nf_name>): Likewise. + (*<insn>hi3_1_zext<mode><nf_name>): Likewise. + * config/i386/sse.md + (*kortest_cmp<mode>_mov<mode>cc): Add + preferred_for_speed for NDD memory alternatives. + +2026-06-01 Hongyu Wang <[email protected]> + + * config/i386/x86-tune.def (X86_TUNE_DISABLE_SETZUCC): New. + Enable for m_DIAMONDRAPIDS | m_NOVALAKE. + * config/i386/i386.h (TARGET_DISABLE_SETZUCC): New define. + * config/i386/i386.md (*setcc_<mode>_zu): Guard with + TARGET_APX_ZU && !TARGET_DISABLE_SETZUCC. + (*setcc_di_1, *setcc_<mode>_1_movzbl): Guard with + (!TARGET_APX_ZU || TARGET_DISABLE_SETZUCC). + (*setcc_qi, *setcc_qi_slp): Emit setzucc only when + TARGET_APX_ZU && !TARGET_DISABLE_SETZUCC. + +2026-06-01 Martin Liska <[email protected]> + + * configure.ac: Declare Wild as capable of LTO bootstrap. + * configure: Regenerate. + 2026-05-31 Andrew Pinski <[email protected]> PR tree-optimization/23471 diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index b135605ac4dc..98ddba91d55c 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20260601 +20260602 diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog index a9432bc92dc8..107f8416b6a6 100644 --- a/gcc/c-family/ChangeLog +++ b/gcc/c-family/ChangeLog @@ -1,3 +1,13 @@ +2026-06-01 Martin Uecker <[email protected]> + + PR c/98539 + * c-warn.cc (warn_parm_array_mismatch): Check number of size + expressions. + +2026-06-01 Mark Wielaard <[email protected]> + + * c.opt.urls: Regenerate. + 2026-05-31 Daniel Barboza <[email protected]> * c.opt: Removed Wstrict-overflow entry. diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index 7afcdaba3f06..5614f161175c 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,20 @@ +2026-06-01 Joe Natter <[email protected]> + + PR c++/125422 + * init.cc (build_new_1): Avoid building a null-check + COND_EXPR when rval == data_addr. + +2026-06-01 yxj-github-437 <[email protected]> + + * module.cc (module_state_config::get_dialect): Add reflection + dialect. + +2026-06-01 Eczbek <[email protected]> + + PR c++/125317 + * parser.cc (cp_parser_requirement_body): Set + parser->greater_than_is_operator_p. + 2026-05-30 Jakub Jelinek <[email protected]> PR c++/125123 diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index d5fc15dc1427..6eb5e12a5e8f 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,30 @@ +2026-06-01 Jerry DeLisle <[email protected]> + + PR fortran/125527 + * class.cc (gfc_find_derived_vtab): Stop the top-level namespace + walk at module/submodule boundaries to avoid escaping a submodule + into its ancestor module namespace. + * openmp.cc (gfc_omp_requires_add_clause): Likewise; treat the + submodule as its own program unit for OMP REQUIRES. + (gfc_match_omp_requires): Likewise; allow OMP REQUIRES in a submodule + spec part even when gfc_current_ns->parent is now non-NULL. + (gfc_match_omp_atomic): Likewise. + * parse.cc (parse_module): After processing USE statements and + host-association traversal, link the submodule namespace to its + ancestor module namespace so internal subprograms are visible via + host association (Fortran 2018, 14.6.1.3). + (clean_up_modules): Reset gfc_current_ns->parent before gfc_done_2 + to prevent double-free of the ancestor module namespace. + +2026-06-01 Jerry DeLisle <[email protected]> + + PR fortran/125481 + * interface.cc (gfc_compare_actual_formal): Add missing check that + rejects a procedure-pointer actual argument corresponding to a + data-object dummy argument (F23:15.5.2.5, para 2). Restrict to + EXPR_VARIABLE to avoid false positives on calls through procedure + pointer components. + 2026-05-30 Jerry DeLisle <[email protected]> PR fortran/105582 diff --git a/gcc/rust/ChangeLog b/gcc/rust/ChangeLog index 14949029f8bc..444ec4398b3b 100644 --- a/gcc/rust/ChangeLog +++ b/gcc/rust/ChangeLog @@ -1,3 +1,135 @@ +2026-06-01 Yap Zhi Heng <[email protected]> + + * parse/rust-parse-impl.hxx(parse_expr_stmt): Return error early when + parse_path_in_expression() returns an error node. + +2026-06-01 lishin <[email protected]> + + * util/rust-lang-item.h (Rust::LangItem::Kind): Add DROP. + * util/rust-lang-item.cc (Rust::LangItem::lang_items): Add drop lang item. + +2026-06-01 Jean-Christian CÎRSTEA <[email protected]> + + * backend/rust-intrinsic-handlers.cc + (check_for_basic_integer_type): Fixed typo. + (build_atomic_builtin_name): Update message. + (unchecked_op, atomic_store, ctlz_handler) + (cttz_handler, bswap_handler): Use call location. + +2026-06-01 Islam-Imad <[email protected]> + + * backend/rust-compile-expr.cc (CompileExpr::visit): Lower labeled block. + (CompileExpr::construct_block_label): Utility function to construct block label. + (CompileExpr::lookup_label): Utility function to lookup label. + (CompileExpr::lookup_temp_var): Utility function to lookup block temp variables. + (CompileExpr::resolve_util): Utility to resolve NodeId to HirId. + * backend/rust-compile-expr.h: Header functions. + * resolve/rust-late-name-resolver-2.0.cc (Late::visit): Fix label resolution. + +2026-06-01 Arthur Cohen <[email protected]> + + * hir/tree/rust-hir-visibility.h: Switch Visibility::VisType to an enum class, adapt + variants' case. + * backend/rust-compile-base.cc (HIRCompileBase::setup_fndecl): Use the new enum API. + * backend/rust-compile-implitem.cc (CompileTraitItem::visit): Likewise. + * checks/errors/privacy/rust-visibility-resolver.cc + (VisibilityResolver::resolve_visibility): Likewise. + * hir/rust-ast-lower.cc (translate_visibility): Likewise. + * hir/tree/rust-hir.cc (Visibility::to_string): Likewise. + * metadata/rust-export-metadata.cc (PublicInterface::is_crate_public): Likewise. + * util/rust-hir-map.cc (Mappings::Mappings): Likewise. + +2026-06-01 Pierre-Emmanuel Patry <[email protected]> + + * checks/errors/feature/rust-feature-gate.cc (FeatureGate::visit): Add + a feature gate around rustc_const_stable attributes. + +2026-06-01 Enes Cevik <[email protected]> + + * lex/rust-lex.cc (Lexer::parse_non_decimal_int_literal): Emit E0768. + +2026-06-01 Enes Cevik <[email protected]> + + * ast/rust-ast-collector.cc (TokenCollector::visit): Update Token::make_int and + Token::make_float calls to include suffix_start and IntegerLiteralBase::Decimal. + * expand/rust-macro-builtins-location.cc (MacroBuiltin::column_handler): Pass string + length and base to Token::make_int. + (MacroBuiltin::line_handler): Likewise. + * lex/rust-lex.cc (Lexer::parse_in_type_suffix): Rename to parse_in_suffix and return + string instead of PrimitiveCoreType. + (Lexer::parse_in_suffix): Remove underscore stripping to preserve source fidelity for + macros. + (Lexer::parse_in_exponent_part): Preserve '+' and '-' characters in the raw string. + (Lexer::parse_in_decimal): Remove underscore stripping. + (Lexer::parse_non_decimal_int_literal): Track suffix start index and pass literal base. + (Lexer::parse_non_decimal_int_literals): Use IntegerLiteralBase enum values instead of + raw integers. + (Lexer::parse_decimal_int_or_float): Track suffix string length and pass base parameters + to token creation. + * lex/rust-lex.h: Update method signatures for suffix parsing. + * lex/rust-token.h (enum class IntegerLiteralBase): New enum to represent numeric bases. + * parse/rust-parse-impl-expr.hxx: use LiteralResolve functions to evaluate raw token + strings. + * parse/rust-parse-impl-pattern.hxx: Use evaluated literal strings for INT and FLOAT + tokens. + * parse/rust-parse.cc (resolve_literal_suffix): Move suffix validation logic from lexer + to parser. + (evaluate_integer_literal): New function to strip underscores and convert to decimal via + GMP. + (evaluate_float_literal): New function to strip underscores from floats. + * parse/rust-parse.h (evaluate_integer_literal): Declare in LiteralResolve namespace. + (evaluate_float_literal): Likewise. + (resolve_literal_suffix): Likewise. + * util/rust-token-converter.cc (from_literal): Safely reconstruct raw text and suffix to + dynamically determine base and suffix_start for ProcMacros. + +2026-06-01 Arthur Cohen <[email protected]> + + * resolve/rust-name-resolution-context.hxx: Do segment resolution in types NS for more + correctness and correct behavior when later resolving paths that use imports and/or + modules. + +2026-06-01 Arthur Cohen <[email protected]> + + * resolve/rust-forever-stack.h: Move declarations from ForeverStack to NRCtx, make most + of the ForeverStack members public as it helps the Ctx a lot. + * resolve/rust-forever-stack.hxx: Move implementation of resolve_path methods to NRCtx. + * resolve/rust-name-resolution-context.h: Declare resolve_path methods. + * resolve/rust-name-resolution-context.hxx: New file with resolve_path impls. + +2026-06-01 Pierre-Emmanuel Patry <[email protected]> + + * expand/rust-macro-builtins-log-debug.cc (MacroBuiltin::assert_handler): + Add basic assert builtin macro handler. + +2026-06-01 lishin <[email protected]> + + * hir/tree/rust-hir-item.cc (TraitFunctionDecl::TraitFunctionDecl): + Handle null return types in copy constructor. + (TraitFunctionDecl::operator=): Likewise. + +2026-06-01 Owen Avery <[email protected]> + + * util/rust-attributes.cc (__definitions): Add entries for warn + and deny attributes. + +2026-06-01 Harishankar <[email protected]> + + * expand/rust-cfg-strip.cc (CfgStrip::visit): mark CallExpr for + strip when function expression fails stripping. + (CfgStrip::visit): mark ArrayIndexExpr for strip when array or + index expression fails stripping. + +2026-06-01 Islam-Imad <[email protected]> + + * backend/rust-compile-expr.cc (CompileExpr::visit): Emit the + missing assignment for CompoundAssignmentExpr. + +2026-06-01 fisnikhasani <[email protected]> + + * lang.opt (flag_name_resolution_2_0): Remove. + * resolve/rust-name-resolver.cc: Remove include. + 2026-05-29 Marc Poulhiès <[email protected]> Andreas Schwab <[email protected]> diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 9f454f69a50e..a9f109382ad4 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,165 @@ +2026-06-01 Jerry DeLisle <[email protected]> + + PR fortran/125527 + * gfortran.dg/submodule_host_assoc_1.f90: New test. + * gfortran.dg/submodule_host_assoc_1_aux.f90: New test. + +2026-06-01 Joe Natter <[email protected]> + + PR c++/125422 + * g++.dg/warn/Wduplicated-branches10.C: New test. + +2026-06-01 Martin Uecker <[email protected]> + + PR c/98539 + * gcc.dg/pr98539.c: New test. + +2026-06-01 Andrew Pinski <[email protected]> + + * g++.dg/opt/shrink-wrapping-vector-1.C: xfail for C++17down. + +2026-06-01 Jerry DeLisle <[email protected]> + + PR fortran/125481 + * gfortran.dg/generic_37.f90: New test. + * gfortran.dg/generic_38.f90: New test. + +2026-06-01 Kyrylo Tkachov <[email protected]> + + PR target/122827 + * gcc.target/aarch64/sve/pr122827.c: New test. + +2026-06-01 Eczbek <[email protected]> + + PR c++/125317 + * g++.dg/cpp2a/concepts-requires42.C: New test. + +2026-06-01 Torbjörn SVENSSON <[email protected]> + + * gcc.dg/lto/toplevel-simple-asm-1_0.c: Adjust inline assembler + for arm-none-eabi. + +2026-06-01 Yap Zhi Heng <[email protected]> + + * rust/compile/empty_path.rs: New file. + +2026-06-01 lishin <[email protected]> + + * rust/compile/drop-lang-item.rs: New test. + +2026-06-01 Jean-Christian CÎRSTEA <[email protected]> + + * rust/compile/bswap.rs: Update error location. + * rust/compile/ctlz.rs: Likewise. + * rust/compile/ctlz_nonzero.rs: Likewise. + * rust/compile/cttz.rs: Likewise. + * rust/compile/cttz_nonzero.rs: Likewise. + * rust/compile/torture/intrinsics-5.rs: Likewise. + * rust/compile/torture/intrinsics-7.rs: Likewise. + +2026-06-01 Islam-Imad <[email protected]> + + * rust/execute/cf-labeled-block.rs: New test. + +2026-06-01 Harishankar <[email protected]> + + * rust/compile/issue-4159.rs: New test + +2026-06-01 Harishankar <[email protected]> + + * rust/compile/issue-4158.rs: New test. + +2026-06-01 Harishankar <[email protected]> + + * rust/compile/issue-3537.rs: New test. + +2026-06-01 Pierre-Emmanuel Patry <[email protected]> + + * rust/compile/const-issue1440.rs: Enable staged_api feature. + * rust/compile/for-loop1.rs: Likewise. + * rust/compile/for-loop2.rs: Likewise. + * rust/compile/issue-1031.rs: Likewise. + * rust/compile/issue-1289.rs: Likewise. + * rust/compile/iterators1.rs: Likewise. + * rust/compile/rustc_const_stable.rs: Likewise. + * rust/compile/torture/issue-1075.rs: Likewise. + * rust/compile/torture/issue-1432.rs: Likewise. + * rust/execute/torture/const-generics-7.rs: Likewise. + * rust/execute/torture/for-loop1.rs: Likewise. + * rust/execute/torture/for-loop2.rs: Likewise. + * rust/execute/torture/issue-1120.rs: Likewise. + * rust/execute/torture/issue-1133.rs: Likewise. + * rust/execute/torture/issue-1232.rs: Likewise. + * rust/execute/torture/issue-1436.rs: Likewise. + * rust/execute/torture/iter1.rs: Likewise. + * rust/execute/torture/slice-magic.rs: Likewise. + * rust/execute/torture/slice-magic2.rs: Likewise. + * rust/execute/torture/str-layout1.rs: Likewise. + * rust/compile/missing_staged_api.rs: New test. + +2026-06-01 Enes Cevik <[email protected]> + + * rust/compile/empty-non-decimal.rs: New test. + +2026-06-01 Enes Cevik <[email protected]> + + * rust/compile/deferred-suffix-validation.rs: New test. + * rust/compile/evaluate-integer-or-float.rs: New test. + * rust/compile/tuple-index.rs: New test. + +2026-06-01 Pierre-Emmanuel Patry <[email protected]> + + * rust/compile/assert_missing_panic.rs: New test. + +2026-06-01 lishin <[email protected]> + + * rust/compile/issue-3972.rs: New test. + +2026-06-01 Harishankar <[email protected]> + + * rust/compile/issue-4167.rs: New test. + +2026-06-01 Islam-Imad <[email protected]> + + * rust/compile/const-compound-assignment.rs: New test. + * rust/execute/const-compound-assignment.rs: New test. + +2026-06-01 Hongyu Wang <[email protected]> + + * gcc.target/i386/apx-ndd-2.c: Add -mtune-ctrl=enable_ndd_mem. + * gcc.target/i386/apx-ndd-adc.c: Likewise. + * gcc.target/i386/apx-ndd-base-index-1.c: Likewise. + * gcc.target/i386/apx-ndd-cmov.c: Likewise. + * gcc.target/i386/apx-ndd-no-seg-global-1.c: Likewise. + * gcc.target/i386/apx-ndd-sbb.c: Likewise. + * gcc.target/i386/apx-ndd-seg-1.c: Likewise. + * gcc.target/i386/apx-ndd-seg-2.c: Likewise. + * gcc.target/i386/apx-ndd-seg-3.c: Likewise. + * gcc.target/i386/apx-ndd-seg-4.c: Likewise. + * gcc.target/i386/apx-ndd-seg-5.c: Likewise. + * gcc.target/i386/apx-ndd-shld-shrd.c: Likewise. + * gcc.target/i386/apx-ndd-tls-1a.c: Likewise. + * gcc.target/i386/apx-ndd-tls-1b.c: Likewise. + * gcc.target/i386/apx-ndd-tls-2.c: Likewise. + * gcc.target/i386/apx-ndd-tls-3.c: Likewise. + * gcc.target/i386/apx-ndd-tls-4.c: Likewise. + * gcc.target/i386/apx-ndd-x32-1.c: Likewise. + * gcc.target/i386/apx-ndd-x32-2a.c: Likewise. + * gcc.target/i386/apx-ndd-x32-2b.c: Likewise. + * gcc.target/i386/apx-ndd-x32-2c.c: Likewise. + * gcc.target/i386/apx-ndd-x32-2d.c: Likewise. + * gcc.target/i386/apx-ndd.c: Likewise. + * gcc.target/i386/pr113729.c: Likewise. + * gcc.target/i386/pr113729-adc-sbb.c: Likewise. + * gcc.target/i386/pr79173-13.c: Likewise. + * gcc.target/i386/pr79173-14.c: Likewise. + * gcc.target/i386/pr79173-15.c: Likewise. + * gcc.target/i386/pr79173-16.c: Likewise. + +2026-06-01 Hongyu Wang <[email protected]> + + * gcc.target/i386/apx-zu-4.c: New test. + 2026-05-31 Andrew Pinski <[email protected]> PR tree-optimization/23471 diff --git a/include/ChangeLog b/include/ChangeLog index 118bdee29cd6..d14b8a036ef9 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,3 +1,8 @@ +2026-06-01 Arsen Arsenović <[email protected]> + + * gomp-constants.h (GOMP_VERSION): Bump. Signature of + GOMP_OFFLOAD_run et al changed. + 2026-05-30 Dhruv Chawla <[email protected]> * hsa.h: Reflow long line. diff --git a/libatomic/ChangeLog b/libatomic/ChangeLog index 67b08f2335bc..07b435e63dcb 100644 --- a/libatomic/ChangeLog +++ b/libatomic/ChangeLog @@ -1,3 +1,8 @@ +2026-06-01 Dhruv Chawla <[email protected]> + + * config/mingw/lock.c: Fix typos. + * config/posix/lock.c: Likewise. + 2026-05-30 Dhruv Chawla <[email protected]> * acinclude.m4: Fix typos. diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index 996ceb400214..73830ec34faa 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,43 @@ +2026-06-01 Dhruv Chawla <[email protected]> + + * config/s390/tpf-unwind.h (s390_fallback_frame_state): Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/pa/linux-atomic.c: Fix typos. + * config/pa/sync-libfuncs.c: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/nvptx/atomic.c: Fix typos. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/nds32/initfini.c: Fix typos. + * config/nds32/linux-atomic.c: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/mips/linux-unwind.h (mips_fallback_frame_state): Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/arm/fp16.c (__gnu_float2h_internal): Fix typos. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/arc/ieee-754/divtab-arc-df.c: Fix typos. + * config/arc/ieee-754/divtab-arc-sf.c: Likewise. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/alpha/vms-unwind.h (alpha_vms_fallback_frame_state): Fix typos. + +2026-06-01 Dhruv Chawla <[email protected]> + + * config/aarch64/aarch64-unwind.h (aarch64_demangle_return_addr): Fix + typos. + 2026-05-30 Dhruv Chawla <[email protected]> * fixed-bit.c: Fix typos. diff --git a/libgcc/config/avr/libf7/ChangeLog b/libgcc/config/avr/libf7/ChangeLog index 325b18d392d2..2012fb2a48e8 100644 --- a/libgcc/config/avr/libf7/ChangeLog +++ b/libgcc/config/avr/libf7/ChangeLog @@ -1,3 +1,9 @@ +2026-06-01 Dhruv Chawla <[email protected]> + + * libf7.c (f7_addsub): Likewise. + (f7_madd_msub): Likewise. + * libf7.h (f7_Ildexp): Likewise. + 2026-05-28 Georg-Johann Lay <[email protected]> * libf7.h: Add "[len=...]]" notes to all non-empty inline asm's. diff --git a/libgm2/ChangeLog b/libgm2/ChangeLog index 014bdda06c59..020c11660138 100644 --- a/libgm2/ChangeLog +++ b/libgm2/ChangeLog @@ -1,3 +1,7 @@ +2026-06-01 Jakub Jelinek <[email protected]> + + * configure: Regenerate. + 2026-05-30 Dhruv Chawla <[email protected]> * configure.ac: Fix typos. diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog index 60bb6c46521b..e887c14b3af8 100644 --- a/libgomp/ChangeLog +++ b/libgomp/ChangeLog @@ -1,3 +1,149 @@ +2026-06-01 Dhruv Chawla <[email protected]> + + * config/gcn/simple-bar.h: Fix typos. + * config/linux/futex.h: Likewise. + * config/nvptx/bar.c (gomp_team_barrier_cancel): Likewise. + * config/nvptx/bar.h (gomp_team_barrier_wake): Likewise. + * config/nvptx/simple-bar.h: Likewise. + * config/posix/sem.c: Likewise. + * config/posix/sem.h: Likewise. + * config/posix/simple-bar.h: Likewise. + +2026-06-01 Arsen Arsenović <[email protected]> + + * oacc-mem.c (goacc_enter_datum): Assert that tgt_offset of the + newly-mapped variable is zero. + +2026-06-01 Arsen Arsenović <[email protected]> + + * plugin/plugin-gcn.c (struct kernel_dispatch): Store + hsa_signal_t, rather than a uint64_t, so that we don't rely on + knowledge of the contents of hsa_signal_t. + (create_kernel_dispatch): Rename... + (prepare_kernel_dispatch): ... to this, as it no longer creates + a kernel dispatch. The allocation that would've created it is + hoisted... + (run_kernel): ... here, as an automatic variable. Move logic + that copies the fields of kernel_dispatch... + (populate_packet_from_dispatch): ... into this standalone + function, to make it clearer. + (release_kernel_dispatch): Rename.... + (cleanup_kernel_dispatch): ... to this, don't free 'shadow'. + +2026-06-01 Arsen Arsenović <[email protected]> + + * libgomp-plugin.h (GOMP_OFFLOAD_run, GOMP_OFFLOAD_exec) + (GOMP_OFFLOAD_async_run, GOMP_OFFLOAD_openacc_async_exec): Pass + session in place of target variable table and devices. + (struct gomp_offload_session): New. + (GOMP_OFFLOAD_session_size): New + (GOMP_OFFLOAD_check_session_struct): New. + (GOMP_OFFLOAD_session_boilerplate): New. + (GOMP_OFFLOAD_session_start): New. + (GOMP_OFFLOAD_session_allocate_target_var_table): New. + (GOMP_OFFLOAD_session_set_target_var_table): New. + * libgomp.h (struct gomp_target_task): Add offload_session + field. + (struct gomp_device_descr): Add offload session management + functions. + (gomp_offload_session_new): New. + (goacc_map_vars): Add SESSION to signature + * oacc-host.c (struct gomp_offload_session): Define, for host + offload fallback case. + (host_session_size): New. Implements GOMP_OFFLOAD_session_size. + (host_session_start): New. Implements + GOMP_OFFLOAD_session_start. + (host_session_set_target_var_table): New. Implements + GOMP_OFFLOAD_session_set_target_var_table. + (host_run): Adjust to match GOMP_OFFLOAD_run. + (host_openacc_exec): Adjust to match GOMP_OFFLOAD_openacc_exec. + (host_openacc_async_exec): Adjust to match + GOMP_OFFLOAD_openacc_async_exec. + * oacc-mem.c (acc_map_data): Adjust call to goacc_map_vars. + (goacc_enter_datum): Ditto. + (goacc_enter_data_internal): Ditto. + * oacc-parallel.c (GOACC_parallel_keyed): Allocate and pass + offload session. + (GOACC_data_start): Adjust call to goacc_map_vars. + * plugin/plugin-gcn.c (struct kernel_dispatch): Remove + kernarg_cache_node. + (struct kernargs): Add a flexible array member for the target + variable table. + (struct kernel_launch): Store an offload session rather than + target var. table pointer. + (print_kernel_dispatch): Receive kernargs as parameter. + (struct gomp_offload_session): Define. + (init_session): New. + (GOMP_OFFLOAD_session_start): Implement, using init_session. + (release_session): New. + (alloc_kernargs_on_agent): Rename to... + (allocate_session_kernargs): ... this, store result in + passed-in SESSION, and allocate extra room for target variable + table (rounding it up to nearest multiple of 64 pointers). + (GOMP_OFFLOAD_session_allocate_target_var_table): Implement + using the previous function. + (GOMP_OFFLOAD_session_set_target_var_table): Ditto. + (create_kernel_dispatch): Remove kernarg allocation, instead + receiving it as an argument. + (release_kernel_dispatch): Receive kernargs as an argument, + don't release them. + (run_kernel): Adjust to use sessions. + (destroy_module): Ditto. + (GOMP_OFFLOAD_load_image): Ditto. + (execute_queue_entry): Adjust to match changed struct + kernel_launch. + (queue_push_launch): Ditto. + (gcn_exec): Receive and pass along session. + (GOMP_OFFLOAD_run): Ditto. + (GOMP_OFFLOAD_async_run): Ditto. + (GOMP_OFFLOAD_openacc_exec): Ditto. + (GOMP_OFFLOAD_openacc_async_exec): Ditto. + * plugin/plugin-nvptx.c (struct gomp_offload_session): Define. + (GOMP_OFFLOAD_session_start): Implement. + (GOMP_OFFLOAD_session_set_target_var_table): Implement. + (GOMP_OFFLOAD_openacc_exec): Adjust to receive session. + (GOMP_OFFLOAD_openacc_async_exec): Ditto. + (GOMP_OFFLOAD_run): Ditto. + * target.c (gomp_get_tvt_size): Extract helper from... + (gomp_map_vars_internal): ... here. Receive SESSION, iff doing + target offload. Use a target variable table on the host + allocated by GOMP_OFFLOAD_session_allocate_target_var_table if + possible, or call GOMP_OFFLOAD_session_set_target_var_table with + an allocated device pointer otherwise. + (gomp_map_vars): Update to pass along session. + (goacc_map_vars): Ditto. + (GOMP_target): Allocate and pass along session. + (GOMP_target_ext): Ditto. + (gomp_target_data_fallback): Adjust call to gomp_map_vars. + (GOMP_target_data): Ditto. + (GOMP_target_data_ext): Ditto. + (GOMP_target_enter_exit_data): Ditto. + (gomp_target_task_fn): Start and pass along session, the storage + for which is allocated by gomp_create_target_task. + (DLSYM2): Rename from DLSYM, adding a new parameter for the + variable to populate, akin to DLSYM_OPT. + (DLSYM): Delegate to DLSYM2. + (gomp_load_plugin_for_device): Populate session-related fields. + * task.c (gomp_create_target_task): Allocate enough storage for + an offload session. + * testsuite/libgomp.c-c++-common/gcn-kernel-launch-no-tvt-alloc.c: New test. + * testsuite/libgomp.c-c++-common/gcn-kernel-launch-tvt-alloc.c: New test. + +2026-06-01 Arsen Arsenović <[email protected]> + + * libgomp.h (struct gomp_thread_start_data): New struct. Holds + thread-independent parameters needed to initialize current + thread. + (struct gomp_team): On GCN, add thr_start_data field, that holds + a gomp_thread_start_data to be used in each thread. + (struct gomp_thread): Add start_data field, that points to + thread initialization parameters. + * config/gcn/team.c (gomp_team_start): Move thread + initialization steps into ... + (gomp_prep_our_thread): this new function, such that it reads + from a gomp_thread_start_data object. + (gomp_thread_start): Call the above to initialize our thread. + 2026-05-30 Dhruv Chawla <[email protected]> * configure: Regenerate. diff --git a/libiberty/ChangeLog b/libiberty/ChangeLog index 3e6250ecec88..3147d8b93fb9 100644 --- a/libiberty/ChangeLog +++ b/libiberty/ChangeLog @@ -1,3 +1,7 @@ +2026-06-01 Jakub Jelinek <[email protected]> + + * configure: Regenerate. + 2026-05-30 Dhruv Chawla <[email protected]> * simple-object-mach-o.c (simple_object_mach_o_write_segment): Reflow diff --git a/libitm/ChangeLog b/libitm/ChangeLog index fd6271ecef4c..532fbfac17f0 100644 --- a/libitm/ChangeLog +++ b/libitm/ChangeLog @@ -1,3 +1,7 @@ +2026-06-01 Dhruv Chawla <[email protected]> + + * config/linux/futex_bits.h: Fix typo. + 2026-05-30 Dhruv Chawla <[email protected]> * configure: Regenerate. diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index bc4bbc66e4b1..d1953b6a282e 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,13 @@ +2026-06-01 Dhruv Chawla <[email protected]> + + * config/os/vxworks/os_defines.h: Fix typos. + +2026-06-01 Tomasz Kamiński <[email protected]> + + * include/bits/random.tcc + (piecewise_constant_distribution:::param_type::param_type): + Replace * with + in __fw argument. + 2026-05-30 Dhruv Chawla <[email protected]> * include/bits/stl_algo.h: Reflow long line.
