https://gcc.gnu.org/g:986fe870abbba2f1883522231db16c0533820fc7
commit r17-2515-g986fe870abbba2f1883522231db16c0533820fc7 Author: GCC Administrator <[email protected]> Date: Sun Jul 19 00:16:30 2026 +0000 Daily bump. Diff: --- gcc/ChangeLog | 37 ++++++++++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/fortran/ChangeLog | 6 ++++++ gcc/testsuite/ChangeLog | 56 +++++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 100 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9a0995f2589d..c77555b57127 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,40 @@ +2026-07-18 Luke Zhuang <[email protected]> + Kito Cheng <[email protected]> + + * config/riscv/riscv.md (@tlsdesc<mode>): Use individual + RVVM1QI clobbers instead of four RVVM8QI. + +2026-07-18 wangjue <[email protected]> + + * config/riscv/riscv.cc (riscv_override_options_after_change): New + function. + (riscv_option_override): Call it. + (TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE): Define. + +2026-07-18 Dusan Stojkovic <[email protected]> + + PR target/123883 + * match.pd ((1<<N) & (1<<N) with different types): New + pattern. + +2026-07-18 Matt Turner <[email protected]> + + PR target/117184 + * lra-eliminations.cc (setup_can_eliminate): Mark the hard frame + pointer live when setting frame_pointer_needed. + +2026-07-18 Xi Ruoyao <[email protected]> + + PR target/126200 + * config/loongarch/predicates.md + (par_const_vector_shf_set_operand): Define as special predicate. + * config/loongarch/lsx.md (lsx_vshuf4i_<lsxfmt_f>): Pass VIMODE + to the predicate of selector. + +2026-07-18 Pan Li <[email protected]> + + * config/riscv/vector.md: Leverage Wvr constraint. + 2026-07-17 Iain Sandoe <[email protected]> * doc/sourcebuild.texi: Document aarch64_mbig_endian. diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 7154e3d89d40..420ab44d5e57 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20260718 +20260719 diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index fefe35b365aa..e08ab5129bbc 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,9 @@ +2026-07-18 Thomas Koenig <[email protected]> + + PR fortran/126058 + * dump-parse-tree.cc (show_attr): Show details of + attr->allocated. + 2026-07-16 Paul-Antoine Arras <[email protected]> * types.def (BT_FN_VOID_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG): New. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index f3a765791636..eb3102bbc5d5 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,59 @@ +2026-07-18 Luke Zhuang <[email protected]> + Kito Cheng <[email protected]> + + * gcc.target/riscv/tlsdesc_clobber_lra.c: New test. + +2026-07-18 wangjue <[email protected]> + + * gcc.target/riscv/unroll-explicit-attr-cunroll.c: New test. + * gcc.target/riscv/unroll-small-loop-cunroll.c: New test. + +2026-07-18 Dusan Stojkovic <[email protected]> + + PR target/123883 + * gcc.target/riscv/pr123883-a.c: New test. + * gcc.target/riscv/pr123883-b.c: New test. + +2026-07-18 Matt Turner <[email protected]> + + PR target/117184 + * gcc.target/alpha/frame-pointer-save-1.c: New test. + +2026-07-18 Xi Ruoyao <[email protected]> + + PR target/126200 + * gcc.target/loongarch/vector/lsx/pr126200.c: New test. + +2026-07-18 Pan Li <[email protected]> + + * gcc.target/riscv/rvv/base/pr112431-13.c: Move to... + * gcc.target/riscv/rvv/base/pr112431-13-0.c: ...here. + * gcc.target/riscv/rvv/base/pr112431-13-1.c: New test. + +2026-07-18 Pan Li <[email protected]> + + * gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_xu-f16-m1.c: New test. + * gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_xu-f16-m2.c: New test. + * gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_xu-f16-m4.c: New test. + * gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_xu-f16-mf2.c: New test. + * gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_xu-f16-mf4.c: New test. + * gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_xu-f32-m1.c: New test. + * gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_xu-f32-m2.c: New test. + * gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_xu-f32-m4.c: New test. + * gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_xu-f32-mf2.c: New test. + +2026-07-18 Pan Li <[email protected]> + + * gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_x-f16-m1.c: New test. + * gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_x-f16-m2.c: New test. + * gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_x-f16-m4.c: New test. + * gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_x-f16-mf2.c: New test. + * gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_x-f16-mf4.c: New test. + * gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_x-f32-m1.c: New test. + * gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_x-f32-m2.c: New test. + * gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_x-f32-m4.c: New test. + * gcc.target/riscv/rvv/autovec/group_overlap/vfwcvt_x-f32-mf2.c: New test. + 2026-07-17 Iain Sandoe <[email protected]> * gcc.target/aarch64/and-be.c: Require big-endian support.
