https://gcc.gnu.org/g:80c5f1cb273732d0da77f491a0808e5a8309b01a

commit r15-11529-g80c5f1cb273732d0da77f491a0808e5a8309b01a
Author: GCC Administrator <[email protected]>
Date:   Sat Aug 29 00:19:53 2026 +0000

    Daily bump.

Diff:
---
 gcc/ChangeLog           | 34 ++++++++++++++++++++++++++++++++++
 gcc/DATESTAMP           |  2 +-
 gcc/testsuite/ChangeLog | 21 +++++++++++++++++++++
 3 files changed, 56 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index df133ab76f09..b06c2a2c4f76 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,37 @@
+2026-08-28  Michael Meissner  <[email protected]>
+
+       PR target/120681
+       * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Allow large
+       code model as well as medium code model.
+       * config/rs6000/rs6000.cc (rs6000_option_override_internal):
+       Likewise.
+       (rs6000_elf_declare_function_name): Don't create the
+       local/non-local labels for large code model if we are using
+       PC-relative addressing.
+
+2026-08-28  Michael Meissner  <[email protected]>
+
+       PR target/120528
+       * config/rs6000/rs6000.md (zero_extend??ti2 peephole2): Add a
+       peephole2 to simplify zero extending a QI/HI/SI/DImode value in
+       memory to a TImode target in a vector register to use the
+       LXVR{B,H,W,D}X instructins.
+
+2026-08-28  Michael Meissner  <[email protected]>
+
+       PR target/99293
+       * config/rs6000/vsx.md (vsx_splat_extract_<mode>): New insn.
+
+2026-08-28  Michael Meissner  <[email protected]>
+
+       PR target/117487
+       * config/rs6000/vsx.md (SFmode logical peephoole): Update comments in
+       the original code that supports power8.
+       (SFBOOL2_*): New constants.
+       (power9/power10 define_peephol2): Add a new define_peephole2 to optimize
+       float and logical operations on power9/power10/power11 similar to the
+       optimiztion that is done on power8.
+
 2026-08-27  Jakub Jelinek  <[email protected]>
 
        Backported from master:
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index f5d0fa89a72b..6bdb0652ae95 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20260828
+20260829
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 44ce86e9664b..a21c6210f716 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,24 @@
+2026-08-28  Michael Meissner  <[email protected]>
+
+       PR target/120681
+       * gcc.target/powerpc/pr120681.c: New test.
+
+2026-08-28  Michael Meissner  <[email protected]>
+
+       PR target/120528
+       * gcc.target/powerpc/pr120528.c: New test.
+
+2026-08-28  Michael Meissner  <[email protected]>
+
+       PR target/99293
+       * gcc.target/powerpc/pr99293.c: New test.
+       * gcc.target/powerpc/builtins-1.c: Update instruction count.
+
+2026-08-28  Michael Meissner  <[email protected]>
+
+       PR target/117487
+       * gcc.target/powerpc/pr117487.c: New test.
+
 2026-08-27  Jakub Jelinek  <[email protected]>
 
        Backported from master:

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