https://gcc.gnu.org/g:dd5a1ec92b2eb50fbc7e01efae3dfd539cfcf914
commit r17-3767-gdd5a1ec92b2eb50fbc7e01efae3dfd539cfcf914 Author: GCC Administrator <[email protected]> Date: Sun Aug 30 00:16:35 2026 +0000 Daily bump. Diff: --- gcc/ChangeLog | 87 +++++++++++++++++++++++++++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/cp/ChangeLog | 5 +++ gcc/testsuite/ChangeLog | 87 +++++++++++++++++++++++++++++++++++++++++++++++++ libcpp/ChangeLog | 7 ++++ 5 files changed, 187 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 78113b027002..ac4603c6bad6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,90 @@ +2026-08-29 Jeff Law <[email protected]> + + * tree-ssa-loop-ivopts.cc (ivopts_estimate_reg_pressure): Remove + stray semi-colon and fix formatting. + +2026-08-29 Mark Wielaard <[email protected]> + + * common.opt.urls: Regenerate. + +2026-08-29 Gerald Pfeifer <[email protected]> + + * doc/install.texi (Configuration): Update SARIF website. + +2026-08-29 Matt Turner <[email protected]> + + * config/alpha/alpha.md (UNSPEC_SSP_SET, UNSPEC_SSP_TEST): New + unspecs. + (stack_protect_set, stack_protect_setdi): New patterns. + (stack_protect_test, stack_protect_testdi): Likewise. + +2026-08-29 Matt Turner <[email protected]> + + * config/alpha/alpha.h (FRAME_GROWS_DOWNWARD): Define. + * config/alpha/alpha.cc (alpha_initial_elimination_offset): Resolve + FRAME_POINTER_REGNUM to the high end of the local variables when + FRAME_GROWS_DOWNWARD. + (alpha_vms_initial_elimination_offset): Likewise. + +2026-08-29 Matt Turner <[email protected]> + + * config/alpha/alpha.cc (alpha_expand_unaligned_load): Use + copy_addr_to_reg to compute the byte address. + (alpha_expand_unaligned_store_safe_partial): Likewise. + +2026-08-29 Jovan Dmitrovic <[email protected]> + Radosav Krunić <[email protected]> + + * tree-ssa-loop-ivopts.cc (ivopts_estimate_reg_pressure): + Change register pressure estimate in order to respect + the impact of spilling induction variables, compared + to spilling loop invariants. + +2026-08-29 Jovan Dmitrovic <[email protected]> + + * tree-ssa-loop-ivopts.cc (ivopts_estimate_reg_pressure): + Remove target_reg_cost from the computation of register pressure + and target_res_regs from the computation of available registers. + +2026-08-29 Jovan Dmitrovic <[email protected]> + Radosav Krunić <[email protected]> + + * tree-ssa-loop-ivopts.cc (ivopts_estimate_reg_pressure): + Remove n_cands bias from reg pressure cost calculation. + +2026-08-29 Matt Turner <[email protected]> + + * config/alpha/alpha.h (FRAME_ADDR_RTX): Define. + +2026-08-29 Matt Turner <[email protected]> + + * builtins.cc (expand_builtin_return_addr): Pass COUNT to + FRAME_ADDR_RTX. + * defaults.h (FRAME_ADDR_RTX): Add COUNT argument. + * config/epiphany/epiphany.h (FRAME_ADDR_RTX): Likewise. + * config/s390/s390.h (FRAME_ADDR_RTX): Likewise. + * config/sparc/sparc.h (FRAME_ADDR_RTX): Likewise. + * doc/tm.texi.in (FRAME_ADDR_RTX): Document COUNT and the + NULL_RTX return value. + * doc/tm.texi: Regenerate. + +2026-08-29 Gerald Pfeifer <[email protected]> + + * doc/extend.texi (ARM ARMv8-M Security Extensions): Update URL. + * doc/invoke.texi (ARM Options): Ditto. + +2026-08-29 Georg-Johann Lay <[email protected]> + + PR middle-end/127098 + * config/avr/avr.md (MPUSH): Add TImode to mode iterator. + * config/avr/avr.h (PUSH_ROUNDING): Adjust comment. + +2026-08-29 Aldy Hernandez <[email protected]> + + PR tree-optimization/126896 + * tree-ssa-phiopt.cc (pass_phiopt::execute): Run + replicate_conds_over_phis in early phiopt too. + 2026-08-28 Kyrylo Tkachov <[email protected]> PR tree-optimization/127039 diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 6bdb0652ae95..cb2d581fd4b4 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20260829 +20260830 diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index 6cf57c3f8ba7..64018638bf4a 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,8 @@ +2026-08-29 Vincenzo Calabretta <[email protected]> + + PR c++/127046 + * constexpr.cc (unshare_constructor): Copy RANGE_EXPR indexes. + 2026-08-28 Wang Jinghao <[email protected]> Jason Merrill <[email protected]> diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index a163b36df4a6..99133d9f113d 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,90 @@ +2026-08-29 H.J. Lu <[email protected]> + + * gcc.target/i386/apx-ndd-adc.c (dg-do): Replace + "target { int128 && { ! ia32 } }" with "target int128". + * gcc.target/i386/apx-ndd-sbb.c (dg-do): Likewise. + * gcc.target/i386/apx-ndd-ti-shift.c (dg-do): Likewise. + +2026-08-29 Vincenzo Calabretta <[email protected]> + + PR c++/127046 + * g++.dg/cpp2a/constexpr-dtor20.C: New test. + +2026-08-29 Matt Turner <[email protected]> + + * gcc.target/alpha/stack-protector-1.c: New test. + +2026-08-29 Matt Turner <[email protected]> + + * gcc.dg/fstack-protector-strong.c: Run on alpha*-*-*. Expect + twice as many stack_chk_fail matches there, since Alpha names the + callee once for !literal and once for !lituse_jsr. + +2026-08-29 Matt Turner <[email protected]> + + * gcc.target/alpha/unaligned-big-frame.c: New test. + +2026-08-29 Matt Turner <[email protected]> + + * gcc.dg/Wno-frame-address.c: Skip on alpha*-*-*. + * gcc.target/alpha/frame-address-1.c: New test. + +2026-08-29 Georg-Johann Lay <[email protected]> + + PR testsuite/117728 + * gcc.dg/tree-ssa/satd-hadamard.c: Require int32plus. + +2026-08-29 Georg-Johann Lay <[email protected]> + + PR testsuite/123967 + * gcc.dg/tree-ssa/pr123967.c: Require int32plus. + +2026-08-29 Georg-Johann Lay <[email protected]> + + PR testsuite/121264 + * gcc.dg/tree-ssa/pr121264.c: Require size32plus. + +2026-08-29 Georg-Johann Lay <[email protected]> + + PR testsuite/112104 + * gcc.dg/tree-ssa/pr112104-2.c: Require int32plus. + +2026-08-29 Georg-Johann Lay <[email protected]> + + PR testsuite/121103 + * gcc.dg/torture/pr121103-1.c (B.n): Use __INT32_TYPE__ + instead of int. + +2026-08-29 Jeff Law <[email protected]> + + * gcc.target/sh/pr51244-20.c: Merge a few sh2a and !sh2a expectations. + +2026-08-29 Jakub Jelinek <[email protected]> + + * gfortran.dg/guality/arg1.f90: Put a breakpoint on volatile + variable increment instead of on the write statement. + +2026-08-29 Georg-Johann Lay <[email protected]> + + PR middle-end/127098 + * gcc.target/avr/torture/pr127098.c: New test. + +2026-08-29 Aldy Hernandez <[email protected]> + + PR tree-optimization/126896 + * gcc.dg/tree-ssa/dom-jump-threading-1.c: Disable phiopt1. + * gcc.dg/tree-ssa/dom-jump-threading-2.c: Likewise. + * gcc.dg/tree-ssa/phi_on_compare-1.c: Scan the phiopt1 dump. + +2026-08-29 Luke Zhuang <[email protected]> + + * gcc.target/riscv/slliw-shifted-bitfield-rtl.c: New test. + +2026-08-29 Jeff Law <[email protected]> + + * gcc.target/riscv/rvv/autovec/reduc/pr123501.c: Adjust expected + output. + 2026-08-28 Iain Sandoe <[email protected]> * c-c++-common/analyzer/flex-with-call-summaries.c: Specify diff --git a/libcpp/ChangeLog b/libcpp/ChangeLog index fbb38b4f8b0b..7880cf0fd7f4 100644 --- a/libcpp/ChangeLog +++ b/libcpp/ChangeLog @@ -1,3 +1,10 @@ +2026-08-29 Kael Andrew Alonzo Franco <[email protected]> + + PR middle-end/125507 + * include/cpplib.h (struct cpp_token): Remove ENUM_BITFIELD. + (struct cpp_hashnode): Ditto. + * include/line-map.h (struct line_map_ordinary): Ditto. + 2026-08-21 Wilco Dijkstra <[email protected]> * lex.cc (search_line_neon): New optimized AdvSIMD implementation.
