https://gcc.gnu.org/g:f22ef246931b2ed7f58add7bed38edbce8ff571a
commit r17-3909-gf22ef246931b2ed7f58add7bed38edbce8ff571a Author: GCC Administrator <[email protected]> Date: Fri Sep 4 00:16:40 2026 +0000 Daily bump. Diff: --- ChangeLog | 16 +++++ contrib/ChangeLog | 5 ++ gcc/ChangeLog | 181 ++++++++++++++++++++++++++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/c-family/ChangeLog | 10 +++ gcc/cp/ChangeLog | 12 ++++ gcc/fortran/ChangeLog | 18 +++++ gcc/testsuite/ChangeLog | 108 +++++++++++++++++++++++++++++ libbacktrace/ChangeLog | 9 +++ libstdc++-v3/ChangeLog | 16 +++++ 10 files changed, 376 insertions(+), 1 deletion(-) diff --git a/ChangeLog b/ChangeLog index bc341afee8d4..10a49c46ec70 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,19 @@ +2026-09-03 Filip Kastl <[email protected]> + + * configure: Regenerate. + +2026-09-03 Dhruv Chawla <[email protected]> + + * Makefile.in: Regenerate. + * Makefile.tpl: Pass "--perf perf.data" to gcc-auto-profile. Separate + the make invocation from perf using "--". + +2026-09-03 Uros Bizjak <[email protected]> + + * Makefile.tpl (mail-report.log): Mark as .PHONY. + (mail-report-with-warnings.log): Likewise. + * Makefile.in: Regenerate. + 2026-09-02 Richard Earnshaw <[email protected]> * MAINTAINERS.yml: Convert an entry to use inactive_DCO. diff --git a/contrib/ChangeLog b/contrib/ChangeLog index db364b1035c0..df56055950d6 100644 --- a/contrib/ChangeLog +++ b/contrib/ChangeLog @@ -1,3 +1,8 @@ +2026-09-03 Dhruv Chawla <[email protected]> + + * gen_autofdo_event.py: Add missed updates for passing "--inherit" and + "-o $perf_file" to perf. + 2026-09-02 Richard Earnshaw <[email protected]> * maintainer_utils.py (maintainer_schema): Set the minimum array diff --git a/gcc/ChangeLog b/gcc/ChangeLog index adfdaa2a19f2..293945958ec5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,184 @@ +2026-09-03 Robin Dapp <[email protected]> + + PR middle-end/125390 + * config/riscv/riscv-v.cc (shuffle_even_odd_patterns): Adjust + check and clarify comment. + * config/riscv/riscv.cc (riscv_can_change_mode_class): Allow + same-sized vectors. + (riscv_regmode_natural_size): Set to "one vector" for VLS modes. + +2026-09-03 Robin Dapp <[email protected]> + Richard Sandiford <[email protected]> + + PR target/124996 + PR middle-end/125390 + * doc/tm.texi: Document int move requirements for + REGMODE_NATURAL_SIZE. + * doc/tm.texi.in: Likewise. + * expmed.cc (store_bit_field_1): Spill unsplittable modes to + memory. + (store_integral_bit_field): Defer unsplittable modes to + extract_bit_field. + (extract_bit_field_1): Spill if necessary. + * expr.cc (read_complex_part): Adjust assert. + * lower-subreg.cc (interesting_mode_p): Don't consider + unsplittable modes as interesting. + (simple_move_operand): Don't split subregs whose outer mode + can be split but the inner mode cannot. + (simplify_subreg_concatn): Don't insist the outer mode is + interesting but rather check that its size is constant. + +2026-09-03 Robin Dapp <[email protected]> + + * config/riscv/riscv-protos.h (riscv_split_quadword_move): + Declare. + * config/riscv/riscv.cc (riscv_subpart): New function to get + TImode sub-parts from OImode regs. + (subreg_word_splittable_p): New function to check if a subreg + (spill_subreg_move): New function. + (riscv_split_doubleword_move): Add unsplittable-subreg handling. + (riscv_split_quadword_move): New function to split OImode. + * config/riscv/riscv.md (movti): New expander. + (movoi): Likewise. + +2026-09-03 Alfie Richards <[email protected]> + + PR target/126629 + * config/aarch64/aarch64-sve-builtins-base.cc + (svldff1_gather_impl::expand): Change ffr update. + (svldff1_gather_extend::expand): Likewise. + (svldxf1_impl::expand): Likewise. + (svldxf1_extend_impl::expand): Likewise. + * config/aarch64/aarch64-sve.md (aarch64_update_ffr_for_load): + Change to... + (@aarch64_update_ffr<mode>): ...this. + +2026-09-03 Andrea Pinski <[email protected]> + + PR tree-optimization/127183 + * tree-eh.cc (lower_eh_constructs_2): Use lhs_could_trap_p for lhs. + (stmt_could_throw_1_p): Use tree_could_throw_1 for lhs. + (tree_could_throw_p): Likewise. + +2026-09-03 Dominic P <[email protected]> + + PR target/96056 + * config/arm/arm.cc (arm_expand_compare_and_swap): Always promote + mod_s to ACQ_REL for the RELEASE/ACQUIRE combination. + +2026-09-03 Kyrylo Tkachov <[email protected]> + + * config/aarch64/iterators.md (vn_mode): Add the SVE modes whose + elements halve without changing the number of lanes. + * config/aarch64/aarch64-sve2.md + (*aarch64_sve_<shrn_op>shrnb<mode>): New pattern. + +2026-09-03 Kyrylo Tkachov <[email protected]> + + * config/aarch64/iterators.md (VNARROWQ, Vnarrowq): Add the SVE + modes whose elements halve without changing the number of lanes. + (Ventype): Add the unpacked SVE modes. + * config/aarch64/aarch64-sve2.md + (<sat_trunc_op>trunc<mode><Vnarrowq>2): New pattern. + +2026-09-03 Josef Melcr <[email protected]> + + * doc/extend.texi: Reformat callback_only attrbute docs. + +2026-09-03 Josef Melcr <[email protected]> + + * doc/extend.texi: Add a line saying variadic functions are + unsupported to the callback_only description. + +2026-09-03 Richard Biener <[email protected]> + + * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost): + Move gpr<->xmm move cost ... + (ix86_vector_costs::add_slp_cost): ... here, to new overload + of add_slp_cost. + * tree-vect-slp.cc (vect_prologue_cost_for_slp): Consistently + set SLP node for all cost components to make grouping for + the add_slp_cost hook work. + (add_slp_costs): Avoid calling vector_costs::add_slp_cost + with NULL SLP node. + +2026-09-03 Richard Biener <[email protected]> + + PR tree-optimization/127195 + * tree-vect-slp.cc (vect_create_constant_vectors): + Properly compute number_of_copies, assert we end up + on a vector boundary. + +2026-09-03 Dhruv Chawla <[email protected]> + + * config/aarch64/gcc-auto-profile: Replace explicit perf.data + with perf_file variable. Add parsing for "--perf" flag. + * config/i386/gcc-auto-profile: Likewise. + +2026-09-03 liuhongt <[email protected]> + + PR tree-optimization/89007 + * tree-vect-patterns.cc (vect_recog_average_pattern): Allow signed + types in the fallback. Check whether the fallback operations are + supported. + +2026-09-03 Richard Biener <[email protected]> + + * tree-vect-slp.cc (vect_bb_vectorization_profitable_p): + Prefer the computed SLP schedule location to determine + the containing loop. Make sure to make lock-step + progress when iterating regions with missing vector/scalar + part. Delay individual assessment of profitability for + the region containing the entry and require profitability + based on total costs. + +2026-09-03 Julio Sotoriva De Bastiani <[email protected]> + + PR target/126096 + * config/aarch64/aarch64-acle-builtins.cc + (gimple_folder::fold_to_pfalse): Handle svcount_t. + * config/aarch64/aarch64-sve-builtins-base.cc + (svpfalse_impl::fold): Handle svcount_t. + (svwhilelx_impl::fold_type): Punt for non-pfalse svcount_t. + +2026-09-03 Kito Cheng <[email protected]> + + * config/riscv/driver-riscv.cc (struct riscv_cpuid): New. + (riscv_cpuid::valid_p, riscv_cpuid::match): New member functions. + (struct riscv_core_id): New. + (riscv_core_ids): New. + (riscv_core_from_cpuid): New function. + (riscv_hwprobe_cpus, riscv_hwprobe_affinity, riscv_hwprobe_this_core): + New functions. + (struct riscv_cpuinfo): Add the identification registers. + (riscv_read_cpuinfo): Read them. + (riscv_cpuid_from_pairs, riscv_cpuid_from_hwprobe) + (riscv_cpuid_from_cpuinfo): New functions. + (riscv_native_tune): New function. + (host_detect_local_cpu): Handle "tune". + * config/riscv/riscv.h (RISCV_NATIVE_SPECS): Handle -mtune=native + and -mcpu=native. + (OPTION_DEFAULT_SPECS): Leave -mcpu=native to RISCV_NATIVE_SPECS. + * config/riscv/x-riscv: Update the dependencies. + * doc/invoke.texi (RISC-V Options): Document -mtune=native and + -mcpu=native. + +2026-09-03 Kito Cheng <[email protected]> + + * config/riscv/riscv-cores.def (RISCV_CORE): Fill in MVENDORID, + MARCHID and MIMPID for sifive-u74, sifive-p550, sifive-p870-d, + spacemit-x60, spacemit-x100 and spacemit-a100. + +2026-09-03 Kito Cheng <[email protected]> + + * common/config/riscv/riscv-hwprobe.h (riscv_core_id_t): New typedef. + * config/riscv/riscv-cores.def (UNKNOWN_ID): New macro. + (RISCV_CORE): Take MVENDORID, MARCHID and MIMPID; pass UNKNOWN_ID + for every core. + * common/config/riscv/riscv-common.cc (RISCV_CORE): Update for the + new arguments. + * config/riscv/gen-riscv-mcpu-texi.cc (RISCV_CORE): Likewise. + 2026-09-02 Andrea Pinski <[email protected]> PR tree-optimization/127092 diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 4eb76dd06b30..a368706addda 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20260903 +20260904 diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog index 1c6381fdefa8..7116834fc64f 100644 --- a/gcc/c-family/ChangeLog +++ b/gcc/c-family/ChangeLog @@ -1,3 +1,13 @@ +2026-09-03 Josef Melcr <[email protected]> + + * c-attribs.cc (handle_callback_only_attribute): Add early + return if the attribute is not used on a function. + +2026-09-03 Josef Melcr <[email protected]> + + * c-attribs.cc (handle_callback_only_attribute): Reject variadic + dispatching or callback functions. + 2026-08-27 Jakub Jelinek <[email protected]> * c.opt (Wsynth): Use 2 spaces instead of 1 between diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index 3c8b2dc5c83f..35ded13439c0 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,15 @@ +2026-09-03 Jakub Jelinek <[email protected]> + + PR c++/127109 + * decl.cc (cp_finish_decomp): Add [dcl.struct.bind]/7 reference + to comment. Use get_temp_regvar and pushdecl instead of + get_internal_target_expr and add_stmt. Set DECL_DECOMP_BASE + to NON_LVALUE_EXPR around the temp regvar. + * cp-tree.h (DECL_DECOMP_BASE): Adjust macro comment. + * semantics.cc (maybe_convert_cond, switch_finish_cond): Check for + NON_LVALUE_EXPR rather than TARGET_EXPR and extract its operand + rather than TARGET_EXPR_SLOT. + 2026-09-02 Lunex <[email protected]> Jason Merrill <[email protected]> diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog index 2fdd83372ec5..911e83caa5d1 100644 --- a/gcc/fortran/ChangeLog +++ b/gcc/fortran/ChangeLog @@ -1,3 +1,21 @@ +2026-09-03 Paul Thomas <[email protected]> + + PR fortran/104750 + * module.cc (mio_full_f2k_derived) : Instead of transferring + the sym_root from the formal namespace, call mio_f2k_derived so + that all required symbols and references are fully loaded. + (read_cleanup): Restore named symtree entries for referenced + PDT type specification parameters during module cleanup, while + preserving existing handling for ordinary hidden symbols and + ignoring formal parameters without namespaces. + (fixup_pdt_parameter_namespaces): A new function that transfers + the namespace of locally declared PDT type specification parms + to the derived-type namespace after skipping inherited parameters, + preserving the existing namespace ownership and ref counting. + (read_module): Call the new fcn after read_cleanup, so that the + required symbol and formal-parameter information has been fully + reconstructed first. + 2026-08-31 Jerry DeLisle <[email protected]> PR fortran/127128 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 598a4eb50030..85208f002777 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,111 @@ +2026-09-03 Robin Dapp <[email protected]> + + PR middle-end/125390 + * gcc.target/riscv/rvv/autovec/subreg-extract.c: Adjust test + expectation. + * gcc.target/riscv/rvv/autovec/vls-vlmax/full-vec-move1.c: + Likewise. + * gcc.target/riscv/rvv/autovec/vls-vlmax/shuffle-evenodd.c: + Likewise. + * gcc.target/riscv/rvv/autovec/pr125390.c: New test. + +2026-09-03 Alfie Richards <[email protected]> + + PR target/126629 + * gcc.target/aarch64/sve/pr126629.c: New test. + * gcc.target/aarch64/sve/pr126629_extend.c: New test. + * gcc.target/aarch64/sve/pr126629_gather.c: New test. + * gcc.target/aarch64/sve/pr126629_gather2.c: New test. + +2026-09-03 Andrea Pinski <[email protected]> + + PR tree-optimization/127183 + * g++.dg/eh/noncall-this-method-1.C: New test. + +2026-09-03 Dominic P <[email protected]> + + PR target/96056 + * gcc.target/arm/atomic-comp-swap-release-acquire-4.c: New test. + +2026-09-03 Kyrylo Tkachov <[email protected]> + + * gcc.target/aarch64/sve2/vect-sat-trunc-shift-1.c: New test. + * gcc.target/aarch64/sve2/vect-sat-trunc-shift-1_run.c: Likewise. + * gcc.target/aarch64/sve2/vect-sat-trunc-shift-2.c: Likewise. + +2026-09-03 Kyrylo Tkachov <[email protected]> + + * gcc.target/aarch64/sve2/vect-sat-trunc-1.c: New test. + * gcc.target/aarch64/sve2/vect-sat-trunc-1_run.c: Likewise. + * gcc.target/aarch64/sve2/vect-sat-trunc-2.c: Likewise. + * gcc.target/aarch64/sve2/vect-sat-trunc-2_run.c: Likewise. + * gcc.target/aarch64/sve2/vect-sat-trunc-clip-1_run.c: Likewise. + +2026-09-03 Josef Melcr <[email protected]> + + * gcc.dg/attr-callback.c: Add testcases for the early return. + +2026-09-03 Josef Melcr <[email protected]> + + * gcc.dg/attr-callback.c: Add testcases for variadic functions. + +2026-09-03 Kyrylo Tkachov <[email protected]> + + * gcc.target/arm/short-it-ifcvt-1.c: Add -mthumb. + * gcc.target/arm/short-it-ifcvt-2.c: Likewise. + +2026-09-03 Richard Biener <[email protected]> + + PR tree-optimization/127195 + * gcc.dg/vect/vect-pr127195.c: New testcase. + +2026-09-03 Paul Thomas <[email protected]> + + PR fortran/104750 + * gfortran.dg/pdt_93.f90: New test. + +2026-09-03 Jakub Jelinek <[email protected]> + + PR c++/127109 + * g++.dg/cpp26/decomp32.C: New test. + +2026-09-03 liuhongt <[email protected]> + + PR tree-optimization/89007 + * gcc.target/i386/pr89007.c: New test. + +2026-09-03 Julio Sotoriva De Bastiani <[email protected]> + + PR target/126096 + * gcc.target/aarch64/sve2/acle/general/whilele_1.c: New test. + * gcc.target/aarch64/sve2/acle/general/whilelt_1.c: New test. + +2026-09-03 Kito Cheng <[email protected]> + + * gcc.target/riscv/march-native-2.c: New test. + * gcc.target/riscv/march-native-3.c: New test. + * gcc.target/riscv/march-native-4.c: New test. + * gcc.target/riscv/cpunative/native_cpu_7.c: New test. + * gcc.target/riscv/cpunative/native_cpu_8.c: New test. + * gcc.target/riscv/cpunative/native_cpu_9.c: New test. + * gcc.target/riscv/cpunative/native_cpu_10.c: New test. + * gcc.target/riscv/cpunative/native_cpu_11.c: New test. + * gcc.target/riscv/cpunative/native_cpu_12.c: New test. + * gcc.target/riscv/cpunative/native_cpu_13.c: New test. + * gcc.target/riscv/cpunative/native_cpu_0.c: Check the tuning too. + * gcc.target/riscv/cpunative/native_cpu_1.c: Likewise. + * gcc.target/riscv/cpunative/native_cpu_2.c: Likewise. + * gcc.target/riscv/cpunative/native_cpu_4.c: Likewise. + * gcc.target/riscv/cpunative/native_cpu_5.c: Likewise. + * gcc.target/riscv/cpunative/native_cpu_6.c: Likewise. + * gcc.target/riscv/cpunative/native_cpu_3.c: Check that an + unrecognised core leaves the tuning alone. + +2026-09-03 Andrea Pinski <[email protected]> + + * gcc.target/i386/pr113609-1.c: Fix for ia32. + * gcc.target/i386/pr113609-2.c: Likewise. + 2026-09-02 Iain Sandoe <[email protected]> * gcc.target/i386/avx2-shiftqihi-constant-2.c: Require AVX512. diff --git a/libbacktrace/ChangeLog b/libbacktrace/ChangeLog index 204310fc76f1..53d0c44bb3dc 100644 --- a/libbacktrace/ChangeLog +++ b/libbacktrace/ChangeLog @@ -1,3 +1,12 @@ +2026-09-03 Ian Lance Taylor <[email protected]> + + * elf.c (backtrace_syminfo_to_full_callback_moredata): Move to + elf.c from fileline.c and make static. + * fileline.c (backtrace_syminfo_to_full_callback_moredata): + Moved to elf.c. + * internal.h (backtrace_syminfo_to_full_callback_moredata): Don't + declare. + 2026-09-01 Ian Lance Taylor <[email protected]> * elf.c (elf_nodebug): Handle state->moredata. diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index cd3bc017eed1..ce92fdaa9863 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,19 @@ +2026-09-03 Nathan Myers <[email protected]> + + PR libstdc++/126800 + * include/bits/hashtable.h: (try_emplace): Call correct helper. + * testsuite/23_containers/unordered_map/modifiers/hetero/insert.cc: + Check whether key arguments have been copied. + +2026-09-03 François Dumont <[email protected]> + + * include/debug/safe_base.h + (_Safe_iterator_base::_M_attach_single): Adapt comment to refer to _M_attach. + (_Safe_iterator_base::_M_detach): Fix comment typo. + (_Safe_iterator_base::_M_detach_single): Adapt comment to refer to _M_detach. + (_Safe_sequence_base::_M_attach_single): Adapt comment to refer to _M_attach. + (_Safe_sequence_base::_M_detach_single): Adapt comment to refer to _M_detach. + 2026-09-02 Jakub Jelinek <[email protected]> P2641R4
