On Fri, Jan 11, 2008 at 09:13:23PM +0000, Peter Clifton wrote: > At netlisting time (for PCB at least), the hierarchy is flattened to > names like "M1/R1" and "M2/R1" (where M1 and M2 are named instantiations > of your sub-circuit, and R1 might be a component within that.
My Xcircuit-based flow does that too. I then use a simple perl script to remap the netlist according to my needs. e.g., M1/R101 M2/R101 M3/R101 M4/R101 comes out as R101 R201 R301 R401 pretty easy for a "power feature" user like me. > There is also the concern that in the past, the tools have relied on > Unix "power features" like command line processing steps, Makefiles > etc.. these give GREAT flexibility to Unix users, but are alien to > Windows. Um, yeah. Ditto. - Larry _______________________________________________ geda-dev mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-dev
