vimal ravi wrote: > Can anybody give more information on the project about uwire support.
The "uwire" net type is from Verilog-AMS. It is used to declare a real-valued net (as opposed to a real-valued variable) that has some restrictions. Icarus Verilog already supports real valued nets so this would be about adding the syntax and checking the restrictions during elaboration. -- Steve Williams "The woods are lovely, dark and deep. steve at icarus.com But I have promises to keep, http://www.icarus.com and lines to code before I sleep, http://www.picturel.com And lines to code before I sleep." _______________________________________________ geda-dev mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-dev
