On Wed, 2008-04-30 at 10:17 +0000, Kai-Martin Knaak wrote: > On Wed, 30 Apr 2008 01:51:27 +0100, Peter Clifton wrote: > > > If there were, a more complex caching scheme could be developed, where > > we store an image a bit larger than the piece we're viewing, so small > > pans can be fast. > > I'd be grateful for this if it applies to the general case, not only > layouts with background. I tend to do tedious work like routing on the > train. However, my laptop is a bit dated (900 MHz pentium, no graphics > accel). Pan and zoom does a bit of stammering compared to my desktop. > With full polygon draw even my one year old desktop feels a tad > unresponsive.
I suspect there are some places we can win some speed in the rendering without having to cache too much. My PCB-internals-foo is lower than my gEDA-internals-foo, and I'll probably want to finish the rendering work I was doing there before moving to look at PCB again. > A screenshot of a typical layout of mine can be seen at > http://lilalaser.de/blog/wp-content/Bilder/Laser/strom-Null.png > and a larger one at: > http://lilalaser.de/blog/wp-content/Bilder/Laser/lars_routing.gif Hey, neat layout ;) -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) _______________________________________________ geda-dev mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-dev
