Hello I called my manufacturer and asked what the rules to prevent silk on copper are. They are: 1) If the construction class is IV (space min. 0.3mm thick, line min. 0.3mm thick) then soldermask cutouts are simply subtracted from the silkscreen. The space between soldermask edge and pad edge must be at least 0.1mm 2) If the construction class is finer, then soldermask cutouts are bloated to the size they would have for class IV, and subtracted from silkscreen.
I suggest that PCB had an additional global parameter SilkMaskCutBloat that the user would set to 0 or a positive number depending on the process he uses. Alternatively, a parameter called SilkPadCutBloat could be, that would describe the process itself (and would be usually set to 4 mils). This would have an advantage that it wouldn't be dependent on the precision class of the board - as my manufacturer said, it would be always exactly 0.1mm. I have been looking into the source if this could be changed (presently only the pad is subtracted without any bloating, which is wrong) and realized a test is being performed there, but the test routine doesn't seem to support any bloat parameter when intersections are being computed. So if I modified the mask-out routine itself I wouldn't still get correct results. How can this be rewritten? Must an additional intersection routine be written? Cl<
