-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Karthik Parashar wrote: > Thanks for the clarification! > > Now, > > As i read the file opcodes.txt (that came with 0.8.2 > tarball) in the VVP directory, i get to understand > that there are two types of registers the index > register(0-3) that are used with "ix" instruction set > and the bit wise registers. So, two questions here. > > 1. How many bit wise registers are present? > 2. What is the length of the index registers?
The index registers are native longs, not Verilog vectors, so 32bit on a 32bit host, 64bits on a 64bit host, etc. And in post-0.8 snapshots they can also be real values. - -- Steve Williams "The woods are lovely, dark and deep. steve at icarus.com But I have promises to keep, http://www.icarus.com and lines to code before I sleep, http://www.picturel.com And lines to code before I sleep." -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.2.5 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iD8DBQFD36JWrPt1Sc2b3ikRArqRAJ9+QRH0RqOixb+oQXRwxhvcd2qEXwCgi6xy /cgUd7G/Ai/N75X1314v1qY= =QbBp -----END PGP SIGNATURE-----
