> This was Advanced Circuits. They actually strip out the 'negative > space' automatically, but they put your file on hold until you call > and tell them it's okay to keep going.
Ok, I talked with AC about this. They automatically restrict silk to whatever's covered by the solder mask (the old pcb let the silk get a little closer; the hid one uses the soldermask). So we seem to have two types of fab houses - those that ignore the silk clears because they're going to do the right thing anyway, and those that ignore them because they don't support them. Sounds like clearance cuts in the silk layer was a bad idea; I think we should take it out and rely on DRC to warn us of silk where it shouldn't be. But it also means we should be drawing that silk on top of the pads in the GUI too, so that you see that it's wrong. Feedback?
