> BTW: How do split up large ICs in multiple (different) symbols? For > example: One symbol for power, clk and JTAG and one symbol for the > rest of the design. I would create the symbols and give them the > same refdes ... don't know if this is the correct way to make it > work!
This is the correct (and common) way of dealing with large packages. _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
