On Mon, 3 Dec 2007, Stephen Williams wrote: > Daniel O'Connor wrote: > > [moved to -user] > > > > On Sun, 2 Dec 2007, Stephen Williams wrote: > >> 2) This looks like a problem long since fixed. Version? > > > > I originally had 0.8.5 - I tried 0.8.6 but no change. > > [inchoate 13:55] ~/projects/verilog-0.8.6 >iverilog -V > > Icarus Verilog version 0.8.6 ($Name: $) > > Copyright 1998-2003 Stephen Williams > > The it seems likely that the fixes are in the devel branch and > not the current stable release. Are you in a position to try the > latest snapshots?
Yep. I grabbed verilog-20070812.tar.gz - is it the latest?
> Another tack is to look at the DCM.v source file. I believe there
> is a compatibility define that you can use to revert the definition
> to a simpler implementation that doesn't use as many advanced
> Verilog features.
There doesn't appear to be any alternative implementation :(
> But if you are up to building and installing software and can use
> the iverilog devel snapshots you should be OK.
I now get..
[inchoate 9:43] ~/work/fpga/SA >iverilog -y . -y
$XILINX/verilog/src/unisims -y $XILINX/verilog/src/XilinxCoreLib SA_test2.v
/usr/local/Xilinx/verilog/src/unisims/DCM.v:45: syntax error
/usr/local/Xilinx/verilog/src/unisims/DCM.v:45: error: syntax error in
parameter list.
/usr/local/Xilinx/verilog/src/unisims/DCM.v:49: syntax error
/usr/local/Xilinx/verilog/src/unisims/DCM.v:49: error: syntax error in
parameter list.
/usr/local/Xilinx/verilog/src/unisims/DCM.v:58: syntax error
/usr/local/Xilinx/verilog/src/unisims/DCM.v:58: error: syntax error localparam
list.
/usr/local/Xilinx/verilog/src/unisims/DCM.v:59: syntax error
/usr/local/Xilinx/verilog/src/unisims/DCM.v:59: error: syntax error localparam
list.
/usr/local/Xilinx/verilog/src/unisims/DCM.v:61: syntax error
/usr/local/Xilinx/verilog/src/unisims/DCM.v:61: error: syntax error localparam
list.
/usr/local/Xilinx/verilog/src/unisims/DCM.v:62: syntax error
/usr/local/Xilinx/verilog/src/unisims/DCM.v:62: error: syntax error
localparam list.
/usr/local/Xilinx/verilog/src/unisims/DCM.v:377: error: identifier
``MAXPERCLKIN'' is not a parameter in SA_test2_v.uut.CLKMGR.dcm_mul2.
/usr/local/Xilinx/verilog/src/unisims/DCM.v:1046: internal error: Missing
expression in parameter replacement for maximum_periodAssertion failed: (val),
function elaborate_scope, file elab_scope.cc, line 154.
Abort trap (core dumped)
Line 377 is..
dcm_maximum_period_check #("CLKIN", MAXPERCLKIN) i_max_clkin (clkin_in);
Line 1046 is..
module dcm_maximum_period_check (clock);
MAXPERCLKIN is defined on line 58 as..
localparam integer MAXPERCLKIN = 1000000; // non-modifiable
simulation parameter
--
Daniel O'Connor software and network engineer
for Genesis Software - http://www.gsoft.com.au
"The nice thing about standards is that there
are so many of them to choose from."
-- Andrew Tanenbaum
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