On Jan 28, 2008 10:49 PM, DJ Delorie <[EMAIL PROTECTED]> wrote: > > > Borrowing from ASIC flow: width/length, number of pins. > > Hmmm... elements should already know this; they have a bounding box > and they can just count their pins.
They don't need to know it in a general case. This is called a parametrized component/cell in the ASIC world. The cell contains some script code that reads the instance attribute value and modifies the layout of the cell accordingly. Whether it is useful for PCB or not - it's up to you. In the ASIC flow primitive devices (and sometimes some more complex blocks as well) are very often laid out this way. This greatly reduces number of cell variants - just imagine having transistor of different widths, lengths, that are butting or not butting other transistors, having different contact configurations, well-tap shapes, well types, metal interconnections connections etc. -r. _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
