Friends - OK, really stupid question: is there a "standard" suffix to use for Verilog include files? I need something different from .v, so my Makefiles and scripts can tell them apart: include files don't get listed on the Icarus command line, even though they are a dependency listed in the Makefile.
I have used .vp and .iv myself in the past. If there is a consensus I will happily switch to it. Consistency is good! - Larry _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
