Stefan Salewski <[EMAIL PROTECTED]> writes: > a) Minimize parasitic capacitance to any AC ground for all > of the signal I/O pins. Parasitic capacitance on the output and > inverting input pins can cause instability—on the noninvert- > ing input, it can react with the source impedance to cause > unintentional bandlimiting. To reduce unwanted capacitance, > a window around the signal I/O pins should be opened in all > of the ground and power planes around those pins. Other- > wise, ground and power planes should be unbroken else- > where on the board. > > Is there a way to to make such windows for pcb, or have I to build the > planes from tiny rectangles? (I have a 6-layer pcb, all OpAmps are SMD, > second layer is groud plane.)
I added corner points to the ground plane to leave windows under the inverting inputs of AD8005 CFAs. Its a mess, but the bords will fly to Mars, as Ales just found out :-) There can be multiple PCB layers in a group (physical layer). How about adding a flag for polarity, so we can have cutouts? And priority by stacking order? Stephan _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
