On Wed, Jan 14, 2009 at 12:53 AM, Joerg <[email protected]> wrote: > > Yes, because you guys don't have to pay 2-3c for each additional > transistor or 5c per FET :-)
At least not for those working. :-) > "But it'll electromigrate itself to death in less than a year" ... "It > only has to live a couple of hours" ... "Oh". Lucky you! In some of our circuits (mostly in RF blocks) getting the layout electromigration clean was really painful. It's not only because of the layout (although this stuff can grow pretty big) but also performance - adding several fat connections with their parasitics can kill otherwise carefully crafted circuit. The verification method is also a major pain in ass. We have learned the hard way to anticipate these problems early, and to employ various sometimes non-obvious tricks to work them around. And that's only one problem, what about decoupling, multiple power domains (for noise filtering and for power-down functions), well biasing, voltage drops, ringing and ESD protection? Regards, -r _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
