Peter TB Brett wrote: > On Thursday 19 March 2009 21:58:59 Josh Jordan wrote: Going to layout after you have >> already decided the best general position for parts makes it much easier. > We'll have to agree to disagree. When I look at a schematic, I want to be > able > to quickly and easily work out what the circuit is designed to do, and having > the pins on my symbols arranged by function and bus offset rather than by > physical position helps a great deal.
And then there's my ex chip design approach -- If the project is complex enough have early schematics in conceptual form, then go to layout oriented form, and if possible, simulate both so they agree. The simulating is usually left off for boards, but... with a little more work on the gnetlist-gnucap-verilog backend, and with iverilog plans to include verilog-ams in its capability, maybe. John _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
