On Mon, Oct 19, 2009 at 08:35:33AM -0400, Bob Paddock wrote: > > To me running Vcc traces all over the board is the surest way to raise > inductance etc., and seems wrong to me.
Plus in high current, low voltage designs (like FPGA core power) the tiny series resistance of even a plane can be a problem. I remember a design with a big honking FPGA and a POLA that was a few inches away due to board constraints. Someone in a meeting mentioned that the 20A 1.2V was sagging 50mV at the FPGA. Do the math and that's only 2.5mOhm drop but still meant the *plane* was dissipating a *watt*. -- Ben Jackson AD7GD <[email protected]> http://www.ben.com/ _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
