> I think he means LVS as in Logic vs Schematic - a form of layout > checking commonly found in ASIC design, not LVDS as in Low-Voltage > Differential Signaling.
Ah. In PCB, what we do is have (1) the netlist, which is from the schematic and knows "what should be", and (2) the rats nest and DRC, which come from the PCB and know "what is". The "o" key compares the two. _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
