Consider a 3x3 BGA chip: pinseq pinnum pinlabel
1 A1 Vdd 2 A2 ENA 3 A3 SCLK 4 B1 SDI 5 B2 SDO 6 B3 ENB 7 C1 D0 8 C2 D1 9 C3 Vss For simulation, pinseq maps the pins to the model's pins, but otherwise, it's just a sort key. _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
