Hi. I like to have my vias non tented. That is, little holes in the solder mask, so that some bare metal is exposed. This comes handy for debugging. Is it possible to configure pcb so that vias are exposed by default?
---<)kaimartin(>--- -- Kai-Martin Knaak Öffentlicher PGP-Schlüssel: http://pgp.mit.edu:11371/pks/lookup?op=get&search=0x6C0B9F53 _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
