On Sat, 15 Jan 2011 17:44:33 -0600 John Griessen <[email protected]> wrote:
> On 01/15/2011 10:52 AM, Florian E. Teply wrote: > > i'd want both simulation as well as generation > > of production-ready data (GDS or OASIS files, preferably OASIS), but > > have not the slightest idea on how to accomplish that or even if > > that's possible with open source software, let alone from within > > gEDA. > > > > Any suggestions? > > > > Thanks, > > Florian > > > I've done chip logic and layout with Cadence tools and it was at > a small start up at first -- Cadence didn't care much about our > success and we had to do all kinds of self starting to get a working > flow even though it cost tons of money. I've not done work with > magic, http://opencircuitdesign.com/verilog/index.html , but from > asking about it on its list, it can > generate GDS2 output and you can extract capacitance from layout with > it. If you sign up for its mail list you can ask Tim Edwards, the > current maintainer and guru about feasibility for your project. > > John Doty mentioned his layout is hired out, but I can't remember > what tools are used. He's going to be your resource for simulation. > > What will you make? some kind of sensor? > First, thanks to all for the contributions, they are much appreciated. What exactly i will make isn't entirely sure yet. My plans are to explore the degradation properties of some 0.25 micron and/or 0.13 micron BiCMOS processes of a small research fab in mixed radiation environments. But I'm still at a very early stage, mostly trying to digest the literature in order to find a small niche where genuinely new insights could be gained. In the long run I plan to integrate the findings into specialized models for simulation. After all the radiation testing and modeling, one might consider this a radiation sensor ;-) Greetings, Florian _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
