On 08/02/11 09:20, Markus Hitter wrote: > > Am 08.02.2011 um 08:44 schrieb rickman: > >> Do you expect these tools to be used to design chips costing far, far >> over $3 Million just for the mask set? > > I'm trying to think 20 years into the future. Especially if it's only a > matter of allowing a compile time flag or not. > > > Markus > > - - - - - - - - - - - - - - - - - - - > Dipl. Ing. (FH) Markus Hitter > http://www.jump-ing.de/ > > > > > > > > _______________________________________________ > geda-user mailing list > [email protected] > http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
First off, is PCB in its current state even remotely usable for chip design (sincere question - I have no idea what actually goes into that), and if not, are there any plans to change that in the near future? If the answer to both questions is "no", then I don't see any problem. As for 20 years in the future, that's a /long/ time (as is anything else over 10 years or so, really). I personally don't think ensuring compatibility with something that far away is worth causing problems on lower-end hardware now. Seeing as 32-bit operating systems (even on 64-bit machines!) are still widely used, and anything smaller than a nanometre is overkill for the time being, I'd say playing nice with 32-bit is, at the moment, more important than making sure people can design chips that can't even be manufactured for another decade or two anyway. Besides, what, ultimately, is to stop the user from simply printing the design at 1:1000 scale? If you're doing something that exotic, the default footprints won't be any good anyway, and if you're creating new ones, you can just as easily create them at 1000 times the actual size and tape-out the final design at 1:1000 scale. Peter _______________________________________________ geda-user mailing list [email protected] http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
