On 28 May 2003 10:01:22 -0500 John Griessen <[EMAIL PROTECTED]> wrote:
> On Wed, 2003-05-28 at 06:59, Terry Porter wrote: > > Hi Ales, > > > > Regarding component creation, is there any standard for symbols designed with > > function foremost > > as opposed to package layout ? > > There are IEEE, JEDEC and GENCAM specs ... I have not really read them > directly ever. The IEEE symbols are the mostly rectangular blocks with > some wider places and a |> at the edge representing a clock input. I hadn't even thought about those alternatives! I was thinking more along the lines of these two different types of symbols:- 1/ Layout representing the actual chip footprint with pin number placement in sequential order and chip functions as per the existing gaf styles. 2/ Layout representing chip function, therefore pin numbers are not always in sequential order chip functions as per the existing gaf styles. Sorry about my ambiguity. > > Magnus, would you please recommend parts of the specs to read? I want > to actually read some of them and separate out what applies to circuit > boards, FPGAs, packaged chips, connection methods. I will edit a > condensed "primer" from them for who else is interested. Any other > "specification read and reduce" editor volunteers? Put me down and pls feel free to email me directly on these issues. Cya -- Kind Regards Terry Homemade pcbs using Gnu/LinuX gEDA/PCB page :- http://w3w.arafuraconnect.com.au/~tp/pcbs.html Gnu/Linux/Debian-3.0 Registration Number: 103931 :http//counter.li.org * Free Software provided by GNU; http://www.gnu.org/philosophy/free-software-for-freedom.html
