Thanks for this well written tutorial, MIke! It really is a speed tool when only occasionally doing verilog to have this to refer to. It goes in my favorites file of verilog notes.
John G On Tue, 2004-04-06 at 18:13, Mike Jarabek wrote: > <snip> > This is a classic race condition that can be avoided by never > allowing a `reg' or `integer' to appear on the left hand side of any > blocking or non-blocking assignement in more than one always block. <snip>
