On Monday 23 August 2004 09:33 am, Dave McGuire wrote: > I understand your point, and I respect your point of view, I just > don't agree with it. I believe these people should FIND some > breadboards and learn a little bit more about what they're getting > into before trying to build an entire computer.
OK. For a minute there, I thought you were being antagonistic for the sake of antagonism. My apologies -- this was my misunderstanding. > (as an aside, can you tell me more about the Kestrel?) The Kestrel's intended purpose is to be a rational, grass-roots computer design employing half-way modern technology, where (quite unlike the PC) *EVERYTHING* is documented openly, BUT, not adopting every possible technology under the sun just because it exists. I sorely dislike fads, and that includes things like bus architectures, graphics architectures, operating system architectures, etc. The model of inspiration is the Commodore 64 -- you could purchase one book, the Commodore 64 Programmers Manual, and you'd get the circuit schematics, register-level programming information, timing diagrams, and descriptions of the ROM-resident OS interfaces (which most people simply didn't use anyway, except for talking to the disk drive). Originally, the Kestrel was to be built around the 65816 microprocessor, running at 12.5MHz (half VGA dot-clock rate, synchronized with VGA interface). But since I couldn't find modern, DIP-form factor RAM chips that could keep up with the 65816's bus timings, I switched to using surface-mount RAMs. It was a slippery slope from there. Attempting to model the bus controller circuit in Verilog, I realized that I couldn't accurately describe the bus timings of the 65816 (I was using a Verilog 6502 implementation that I hacked up to try and emulate a 65816's bus tenures, since they are nearly identical. Verilog wouldn't have anything to do with it, unfortunately). So I decided to make a stub processor in Verilog that matched the 65816's bus tenures, and then decided, "Wait a minute, if I've gone through this amount of work, I might as well just design my own CPU." That was the birth of the FTS-1001 MISC CPU architecture, which is currently documented on the website (http://www.falvotech.com/kestrel.html). The problem is, as I've later found out, the FTS-1001 MISC architecture compromised at least one active patent, so I decided to investigate a transport-triggered architecture. The design of the FTS-1001 TTA architecture isn't on the site. It's also rather incomplete at this stage, but after careful design and examination (e.g., I couldn't find a way to get single-cycle flow control operations, for example), I decided against using the TTA as well. So I started looking at the OpenRISC architecture. Anyway, at about the same time, I *finally* heard back from Insight Electronics a price for the FPGA needed to implement the OR1200 design, and that immediately caused me to shut the project down. The Kestrel is currently suspended on the basis that, no matter what I do, I won't be able to meet the target price point. It's in, "I'm starting over from scratch" stage. So, as Dave mentions elsewhere in his original message, I'm going to rebrand the Kestrel as an ADVANCED kit, and will make extensive use of SMT chips. Though, for sanity reasons, I'm probably not going to use SMT resistors or capacitors. Those are just too small, even for me. :) The over-arching goals of the project remain the same: * An open, completely documented architecture, able to be described in a SINGLE BOOK. This is obviously inspired by the Commodore 64. * Fan-less design, which means, low power, even at the expense of computation speed. The AT91-device I'm looking at has roughly 66MHz clock. The MIPS has a 125MHz external clock, but even so, still draws around 1W tops. Note that I'm not aiming for the lowEST power -- but fanless design is critical. * Integrated language and minimal OS, making it usable, if not useful, even without a harddrive. Forth satisfies this requirement on both levels at the same time. And besides, let's face it -- Forth is easy to learn, runs very fast, and consumes very, very little amount of code space. It's a win-win-win decision. * System RAM checks on-demand, not always. I'm sick and tired of purchasing ever-faster PCs, and waiting ever-longer for the #*$&#$^ BIOS to check RAM! C'MON! If it booted yesterday, it's more than likely it'll boot today. * Instant on, (nearly) instant off. One of the biggest reasons for my increased power bill is the sheer expense of shutting my computer down. It takes forever for Linux to just shut down. On the Amiga, you just waited 5 seconds, without touching anything, (that's it) for the disk caches to sync with the volumes, and then you flicked the power switch. End of discussion. Not so with Windows or Linux. Anyway, boot-up is way, way more expensive. It has to check RAM every freaking time (which requires my intervention to prevent), it probes the buses and takes its damn sweet time doing it, etc. AmigaOS did all this in a fraction of a second. Heck, even just spending 5 seconds is sufficient for me. But remember that this is added on to the start-up time of the OS you're loading too! The goal: instant on, instant off. Trust me -- it really DOES make a difference! * NVRAM-less design. Autodetect everything that you can, as fast as you can. Time-of-day clock would be the only exception, but since it's more a "peripheral" than a general purpose configuration storage system, I consider this acceptable. * Lightning fast I/O auto-detection. I think I've mentioned this four times now. If not, here it is again. * Lightning fast I/O auto-detection. If the Amiga can do it with 8MHz processor technology, so can we with 66MHz. I simply cannot emphasize this enough. * Relatively easy to build. Since this is now an advanced kit idea, this isn't nearly as weighted as it used to be. Nonetheless, it is a goal to strive for. * Minimum cost. I am considering sacrificing expansion slots on the "low end" model to save PCB space and make the whole kit cheaper. The higher end machines would have a bus architecture modeled after the Wishbone bus system. * If you need to join a SIG to make and commercially sell peripherals for a kind of interface, we don't officially support that interface. Besides being a total pain in the butt to implement the bus itself, it's just plain too damn hard to make a PCI card. You have to spend a gazillion dollars to get a mfr ID. And while I'd like to support USB, it's still not high on my priority list. It's nice if you have a finished product idea, but it's just too hard to "hack" around with for quick, one-off electronics designs. Yeah, you can get those RS-232 to USB converter chips and all that -- but those don't go terribly far when you think about it. The biggest expense with USB, though, is the host controller. The whole purpose is to have FUN with this computer -- to have fun building it, to have fun using it, to have fun expanding it. Part of this fun factor is being able to hack the hardware as much as you can hack the software. Commodore's IEC bus, HP's HP-IL, and Amiga's Zorro bus are all inspirations here. Maybe also Mac's NuBus too, but I don't know too much about it. All I know is, it wasn't hard to build a Zorro card that fully interoperated with the system, you didn't need to be registered with anyone but Commodore (and they gave away mfr IDs for FREE), and full hardware interface details were available in the Amiga HRM for a cost of $29.99 US. It was bliss. * Everything is LGPLed. So if you DID want to include PCI slots or whatever, please feel free!! Just because it's not my personal priority with the system doesn't mean it's not someone else's. This is the beauty of open source and, indeed, open hardware. * In the event that the Kestrel ended up selling rather well, and I was unable to fulfill orders fast enough, I also wanted to use the Kestrel to explore a combination multi-level-marketing *and* multi-level-distribution scheme. My inspiration for this model is the patently obvious successes of Amway distributors (no, I'm not affiliated with Amway, and never will be), combined with the distribution model employed by In-N-Out Burger (having been a former employee of INO, I clearly know that it works). The end result is essentially a franchising operation. However, unlike most other franchises, my philosophy is, "If I help my distributors make money, then I'll make money too." I don't believe in whoring cash. If I did, I wouldn't make this project LGPL. * Support for new business opportunities. Some might argue that I lack the experience to even persue this ambitious a project, even in kit form. Whether that's true or not, it's DEFINITELY true for the case of pre-fabricated boards, design for computer cases, etc. Those who wish to sell pre-made Kestrel systems are just as welcome to enter this market as anyone else. And, since everything is all open anyway, if I wanted to sell them, I could just make arrangements to *re-sell* them on my site, while I also continue to sell kits. This ties into the prime goal of this whole thing, which is, * The creation of a vibrant and healthy user and developer community, capable of supporting itself on both software AND hardware fronts. This is all just a dream. Maybe I'm being anachronistic. I don't know. But all I know is that the PC industry has cancer, and it's spreading to everything else we do. Especially with Windows Longhorn and it's fully integrated Palladium technology. > On that topic...I've seen mention of those MIPS processors a few > times here. What chips are these? Do you have a URL or a part > number? I apologize for this gargantuan URL. http://www.insight-electronics.com/cgi-bin/bvutf8sq/memec/scripts/local/mc_loc_para_product_search.jsp?type=contain&Div=INSIGHT&Reg=AMERICAS&Country=UNITED_STATES&Lang=EN&PnACountry=UNITED_STATES&cursor=null&searchType=PartSearch&search=RM5231A&text=RM5231A&ili=1&uid=-4379 If you don't feel like clicking on that, there you'll find the RM5231A at 300MHz for $22.40 in quantities of one. The 400MHz version goes for $27.73. -- Samuel A. Falvo II
