Em Qui 07 Out 2004 23:30, Stephen Meier escreveu: > My board is off to the fab house. 15 inches by 8.6 inches some 1050 > parts. I will write a script to count pads latter. > > Xilinx Virtex II pro V30.... 896 pin BGA 1 mm pich vias in pads > > (4) 100 pin quad flat pack devices. > > 8 layer board which really isn't enough.... time to get PCB to have a > reasonable number of layers... yes yes i know it will be a lot of work.
Wow... I never made a board with more than 2 layers (front and back)... That is a problem living in a third world country... > Back anotation is missing so I wrote a program that flips the pins in > the geda symbols. This is ok if you only have one board and don't mind > messing with your own symbols but isn't really good for future unified > libraries. > > Hierarchical buses. Well I have a custom version of gschem and gnetlist > running. I promise, upon getting this board running, I will fininsh the > patches that will allow a general release. > > My personal library of symbols for gschem and land patterns for pcb is > getting extensive again I promise a general release soon. > > Yes very complex boards can be built with these tools but it isn't easy. > Next generation BGA will probably require buiried vias, blind vias and > micro vias. Boards of upto 40 layers have been built by the shop I > normally use (not designed with geda and pcb). I just cant image such a board... How thick they are?
