Hi, Probably, You have to remove testfixture.v from vlogTST. Because, you already specified that file in the tstcmnd.
On Sun, 07 Aug 2005 14:50:51 -0500 "Harold D. Skank" <[EMAIL PROTECTED]> wrote: > People, > > I'm using Icarus Verilog as a front end to some Lattice tools. > Basically I have two questions, an immediate procedural question, then a > longer term question regarding how to write some ancillary programs. > > The procedural question: I've attached the programs I'm currently > attempting to run. When I call the ./vlogTST program (also attached) I > get the following output on the control console. Please ignore the > syntax error info associated with v:37, I know about that and will > eventually get it corrected. What I don't understand is what the v:51: > message is trying to tell me. > > [EMAIL PROTECTED] RcvAlg]$ ./vlogTST > /home/designer/Etrema/RcvAlg/testfixture.v:37: syntax error > /home/designer/Etrema/RcvAlg/testfixture.v:37: error: malformed > statement > testfixture.v:37: syntax error > testfixture.v:37: error: malformed statement > testfixture.v:51: Module testfixture was already declared > here: /home/designer/Etrema/RcvAlg/testfixture.v:14 > > For the second question, the old iverilog-fpga man page (apparently > older than the current iverilog man page) referring to the parch=lpm > option indicates that users may write interface libraries to connect > netlists to vendor architecture. I'm using Lattice devices, and have to > go through an involved procedure to get from the behavioral code to the > EDIF model acceptable to my Lattice compiler. First of all, is this > possibility (writing the interface library) still available, and if so, > could you give me some clues about how to start? > > Thank you for your consideration. > > Harold Skank >
