On Fri, Sep 09, 2005 at 06:45:12AM -0500, David D. Hagood wrote: > Wilbert Knol wrote: > >Idea and I have always been totally intrigued why anyone would want > >to do this - I have yet to see a single, good argument in favour. > > > > OK, try this - there is not always a one-to-one mapping from entities on > the schematic to ICs. Consider a 7400 quad NAND gate chip: this part is > not rendered as a box with 4 NANDs in it, but as four separate NAND > gates "floating around" on the schematic. OK, so, where do you put the > power pins? > > 1) On every device, and have the problem of somebody connecting U1A's > Vcc to the +5 digital net, and U1B's Vcc to the +5 analog net? > 2) On one device in the package? Now one device is "special" and has > extra pins, so you cannot auto-number them. > 3) On a hidden net so that the normal behavior is that the parts "Just > Work". > > I agree - when you are dealing with a device for which there is a > one-to-one mapping between schematic and board hidden nets are not > really needed, but for some devices they really do make things cleaner.
I once needed to filter power of crystal oscillator with resistor and capacitor and it was pain in the ass. I thing the Eagle-style "seventh gates" are the best. CL<
