Antonio Bergnoli <[EMAIL PROTECTED]> wrote: > I know two of such open source software: > -flexloader > -openwince-jtag
I wasn't talking about the physical loading of the SOF into the chip, I was talking about the *generation* of the SOF on the development host from EDIF (Icarus Verilog output), i.e., the fitter, place and route, and final SOF generator. MS
