Charles,
Also, I tried and failed to sudo make iverilog. This is where the
compiler stopped
make[1]: *** No rule to make target `../vvp/libvpi.a', needed by
`cadpli.vpl'. Stop.
make: *** [all] Error 2
I don't see any mention in the build log of this. You may have to do a
'make clean' first to get back to where this error happens.
When I did the pipe make> verilogmakelog.txt, the 4 lines below did
not get piped into the text file. Instead, they were still printed on
the screen. Maybe the make has an output to stderr and another to
stdout and the pipe to the text file only caught one of the two.
make[1]: *** [vvp] Error 1
make[1]: *** No rule to make target `../vvp/libvpi.a', needed by
`system.vpi'. Stop.
make[1]: *** No rule to make target `../vvp/libvpi.a', needed by
`cadpli.vpl'. Stop.
make: *** [all] Error 2
Cheers,
Frank
