> I think that transistors are allways have BCE pins and so there should > be a simple sulution for the problem. But I can't see it! Most TO92 > and TO220 have same pinout so this hsould be no problem. What are > the other geda tools expect?
"Most" TO-220 packages use the same transistor pin-out, but not necessarily all. The SOT-23 package is notorious because different transistors use different pin-outs. Therefore, you must always watch out! There is no mandated "standard" gschem transistor with a mandated "standard" pinout. This situation can be confusing to newbies. However, since each transistor pinout is potentially different, trying to mandate a standard way to do it can lead to problems. Also, since gEDA is a distributed project (i.e. many authors), there is no library dictator who forces everything to obey one standard or another. It's up to each user to validate his own symbols and footprints. > Which pinname on which pin should > be used! For transistors, use pinname = C, B, E. Use pinnumber = 1, 2, 3. If you're using SPICE, also set the pinseq attribute = 1, 2, 3. >I think the tools are pretty good, but the librarys are > unusable and confusing. This complaint is nearing FAQ status. I need to write something about this . . . . > Which pinout we have to use for spice and others? -- spice-sdb emits pins in the order specified by the pinseq attribute. If you want to create SPICE netlists, you are best off using the SPICE-NPN and SPICE-PNP transistor symbols in the spice directory. -- The PCB layout netlister emits pins in the order specified by the symbol's pinnumber attribute. These are different because the pin emission order is important, and SPICE and layout programs ususally use different emission orders for the same part. > Anybody out there having an idea to solve the problem? Nobody will "solve" this problem. It's up to you to make sure the symbols and footprints on your design (or in your library) match each other. On second thought, I would be happy to "solve" this problem once and for all by becoming the gEDA library manager. However, before I quit my day-job to do this, I want to sign a twelve-month contract with you for $95/hour (1/3 payable upfront in US$ or the equivalent in Euro, 1/3 payable after the symbols are done, and 1/3 due at completion of job), with a specified minimum number of hours, a "time not to exceed" clause for your protection, and a clearly written statement of work. I will contact you off list to get your banking information. Oh ... you don't want to do that? Then I guess you can mamage your own symbols and footprints, using the materials in the libraries as a starting point. > Again: > I need an info, which! side I have to change to make it a tool chain!!! > Changing symbols in gschem or changing elements in pcb? You can do it any way you want. My suggestion, however is this: 1. Find (or draw) the PCB footprints you want to use. Make sure to number the component pads as specified in the datasheet. Use "1, 2, 3" as the pad numbers. 2. Find (or draw) a transistor symbol you want to use. There may be one in the symbol library all ready to go, with the proper pin numbering for your footprint. If so, great! Otherwise, copy an existing transistor symbol into your local directory & edit the pinnumber attributes to match those on your PCB footprint (and in the datasheet). I think it easier to draw schematic symbols than footprints. Therefore, I usually make my symbols match my footprints. In my projects, I usually have a subdirectory of the main project dir called "symbols" where I place symbol files. Then use this transistor symbol (in your local directory) when you draw your schematic. (Don't forget to set your gafrc to point to this local directory.) 3. Check and check again when you design and lay out your board. When you first place your transistor footprint in PCB, make sure that the correct nets are attached to the correct pins. Then, when you are done with your layout, print out your schematic & your layout and use a pen to trace out each net on both the schematic and layout. Verify the layout against the schematic, *and* also against the datasheet pinout for each device. Remember: Check and check again! This admonition also applies to commercial tools, so get used to it! Stuart
