> You could probably fix it with something gross like series R in the line > and a bypass cap to ground (the ground the latch sees - the chips pin > 10) right at the octal latch.
That's been suggested before. Sadly, there's not a lot of hackability in that board (hey, it's my first in a long time, and it already has one flying transistor in it and a few cut traces). Hence the redesign. > assuming the latch is cmos, TTL. > A somewhat easier solution could be to use a USB io in the interface > box - but that does not get rid of the beige box. Hence the 10baseT port in the new design ;-) The board will have a serial port too, for debugging and programming, but I don't plan on using it much once the 10baseT is running. > A fet gate is only high impedance at DC. All that gate-drain capacitance > matters. Oh crap, you're right. Still, I was planning on a 100k or more resistor in series with the gates. Sufficient? Or plan on an opto? Actually, the drive FETS have both a resistor and a zener in series, so that a floating I/O will drive neither FET. It's a funny circuit, and I probably should work on that first and post it. And the I/O line has a pair of inductors on it (LCL filter), probably a 12MHz low pass filter.
