On Fri, Mar 24, 2006 at 10:41:48AM +0100, Bill Sloman wrote: > At 04:11 24-3-2006, you wrote: > > >> You're going to send this board out to a fab house, right? > > > >Right. The current choice is pcbpool - 4 layers 20 sq, 6/6/12, qty 1, > >for $104. Unless find two other people who want a generic cpu/net/AC > >board, in which case it's about $160 for 3. > > > >However, it's really hard to hack the inner layers, if needed. > > If you restrict the inner layers to ground and power planes, this > isn't a real problem - you may have to drill out a through-plated > hole that provides an eventually unwanted connection to a ground or > power plane, but this is rarely a problem. > > >> So why waste time and increase risk to save two digits of cost? > > > >Well, it's more a question of "will it help with EMI"? > > It certainly will. At Cambridge Instruments in the 1980's we upgraded > a number of EMI-sensitive two-layer boards to four layers, and found > that we could throw away the solid aluminum screens that we'd had to > fit between the 2-layers boards to keep pick-up within bounds. The > ground/power planes were much closer to the sensitive traces than the > external conductive screens, and provided much better screening in > consequence. > > >> The latest thinking on this is: Use one plane. Keep analog and > >> digital components physically separated, but don't split the plane. > > > >Problem is, the CPU/net is between the power supply and the I/O blocks > >:-P I figured for the I/O power I could run a trace around the edge, > >so no signal traces cross it, and have the FETs bridge the gap. > > > >> If you split the plane, you run the risk of running tracks over > >> slots and other GND structures in your board which can > >> radiate/receive & can contribute to SI problems. > > > >Actually, I think I can easily avoid this. The I/O block is near the > >edge anyway, so the only things that go there are the things that need > >the isolation. The 10baset is also not much of a problem, it's near > >the P/S anyway and the gap would only surround the analog half of the > >chip and the magnetics. > > > >I just don't know if it will make a difference. Remember, it's not > >*generated* EMI I'm worried about, it's *received* EMI. Hence, I'm > >trying to isolate the I/O power - the 18g wires to the thermostats, > >the 10baseT wire, and the 24VAC power wire. Those wires act as > >antennas to pick up crap from the rest of the furnace, I'm trying to > >keep the crap away from the CPU. > > > >> http://www.hottconsultants.com/techtips/split-gnd-plane.html > >> www.national.com/appinfo/adc/files/questweb_dec_2001.pdf > > > >Ah, more late night reading :-) > > Inner ground planes are surprisingly effective in reducing received > EMI. Effectively you form a negative image of the extemal EMI source > behind the ground plane and the sensitive trace sees the dipole field > just above the ground plane (where the dipole field has to be zero). > Because the gap between trace and ground plane is small, the filed is low.
But will this not add a capacitance to the traces which can be a problem for HF circuits? CL< > > -- > Bill Sloman, Nijmegen >
