I think I answered both my questions :)
1 - I had made the invisible text visible, which is a permanent change (
as opposed to show/hide inv text ). This changed the way the preview
scaled because of all the extra text on top.
2 - It is aligned, but to a 50 thou grid instead of a 100 thou grid.
Definitely impressed with the program now that I've passed the steep
beginning learning curve!
Cheers,
-Dan
Dan Sandberg wrote:
Ok, I opted to add power pins to the symbol because the idea of having
capacitors floating near the part struck me as odd :)
Some questions about custom components:
1- I copied the Atmega8-1.sym symbol and pasted it on a new page, and
saved the new page as Atmega8-dan.sym. Why is my chip zoomed out in
the add component preview window as compared to the original? I did a
translate 0 before saving, and I made my zoom the same as the original
before saving too. What else effects how it looks in the preview?
2 - I believe the docs recommend that things generally be snapped to
the grid. How come this part's components ( pins, rectangle, ... )
aren't aligned to the grid?
Thanks for the help,
-Dan
John Doty wrote:
On Jun 5, 2006, at 5:28 AM, Stuart Brorson wrote:
Here are possible things you can do:
* Redraw the symbol. Yes, it's a PITA, but part of doing designs is
drawing symbols.
* If the symbol has implied power pins (net= attribute), then just
stick your decoupling cap on the same schematic sheet and attach it to
your power net and GND. To attach to the power net, just draw a net
from the cap, and then give the net a netname= attribute.
Another way is to draw a separate symbol for the power and ground
pins, and then give it the same refdes as the powerless symbol. Now
you can have a perfectly explicit drawing of power distribution, but
avoid cluttering the signal flow drawing with that stuff. This works
for most gnetlist back ends, but unfortunately not for spice-sdb.
Stuart, can this be fixed? Your spice-sdb gives the obscure "Invalid
wanted_pin passed to gnet-nets [unknown]" error when it sees a
duplicate refdes. The reason I ask is that I'm retrofitting my chip
design to have explicit power distribution (ah, the joy of changing
customer requirements ;-).
John Doty Noqsi Aerospace, Ltd.
[EMAIL PROTECTED]
