Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/25948 )

Change subject: arch,sim: Return whether or not a pseudo inst was recognized.
......................................................................

arch,sim: Return whether or not a pseudo inst was recognized.

Otherwise there's no way to distinguish whether return values are from
the calls themselves, including what they mean in the context (success
or failure?) or the pseudo inst dispatch function itself.

Change-Id: I3e71c277f175c69af0d1adeb3299d88d095dfa84
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25948
Tested-by: Gem5 Cloud Project GCB service account <345032938...@cloudbuild.gserviceaccount.com>
Tested-by: kokoro <noreply+kok...@google.com>
Maintainer: Jason Lowe-Power <power...@gmail.com>
Reviewed-by: Jason Lowe-Power <power...@gmail.com>
Reviewed-by: Alexandru Duțu <alexandru.d...@amd.com>
---
M src/arch/arm/tlb.cc
M src/arch/x86/tlb.cc
M src/sim/pseudo_inst.hh
3 files changed, 42 insertions(+), 34 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  Alexandru Duțu: Looks good to me, approved
  kokoro: Regressions pass
  Gem5 Cloud Project GCB service account: Regressions pass



diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc
index 5a92a0c..84160bb 100644
--- a/src/arch/arm/tlb.cc
+++ b/src/arch/arm/tlb.cc
@@ -141,7 +141,8 @@
         req->setLocalAccessor(
             [func, mode](ThreadContext *tc, PacketPtr pkt) -> Cycles
             {
- uint64_t ret = PseudoInst::pseudoInst<PseudoInstABI>(tc, func);
+                uint64_t ret;
+                PseudoInst::pseudoInst<PseudoInstABI>(tc, func, ret);
                 if (mode == Read)
                     pkt->setLE(ret);
                 return Cycles(1);
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index 46bab48..53492b0 100644
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -265,8 +265,8 @@
         req->setLocalAccessor(
             [func, mode](ThreadContext *tc, PacketPtr pkt) -> Cycles
             {
-                uint64_t ret =
-                    PseudoInst::pseudoInst<X86PseudoInstABI>(tc, func);
+                uint64_t ret;
+                PseudoInst::pseudoInst<X86PseudoInstABI>(tc, func, ret);
                 if (mode == Read)
                     pkt->setLE(ret);
                 return Cycles(1);
diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh
index fbf997a..be9e5bb 100644
--- a/src/sim/pseudo_inst.hh
+++ b/src/sim/pseudo_inst.hh
@@ -130,100 +130,109 @@
  * manner using the ISA-specific getArguments functions.
  *
  * @param func M5 pseudo op major function number (see utility/m5/m5ops.h)
+ * @param result A reference to a uint64_t to store a result in.
+ * @return Whether the pseudo instruction was recognized/handled.
  */

 template <typename ABI>
-uint64_t
-pseudoInst(ThreadContext *tc, uint8_t func)
+bool
+pseudoInst(ThreadContext *tc, uint8_t func, uint64_t &result)
 {
     DPRINTF(PseudoInst, "PseudoInst::pseudoInst(%i)\n", func);

+    result = 0;
+
     switch (func) {
       case M5OP_ARM:
         invokeSimcall<ABI>(tc, arm);
-        break;
+        return true;

       case M5OP_QUIESCE:
         invokeSimcall<ABI>(tc, quiesce);
-        break;
+        return true;

       case M5OP_QUIESCE_NS:
         invokeSimcall<ABI>(tc, quiesceNs);
-        break;
+        return true;

       case M5OP_QUIESCE_CYCLE:
         invokeSimcall<ABI>(tc, quiesceCycles);
-        break;
+        return true;

       case M5OP_QUIESCE_TIME:
-        return invokeSimcall<ABI>(tc, quiesceTime);
+        result = invokeSimcall<ABI>(tc, quiesceTime);
+        return true;

       case M5OP_RPNS:
-        return invokeSimcall<ABI>(tc, rpns);
+        result = invokeSimcall<ABI>(tc, rpns);
+        return true;

       case M5OP_WAKE_CPU:
         invokeSimcall<ABI>(tc, wakeCPU);
-        break;
+        return true;

       case M5OP_EXIT:
         invokeSimcall<ABI>(tc, m5exit);
-        break;
+        return true;

       case M5OP_FAIL:
         invokeSimcall<ABI>(tc, m5fail);
-        break;
+        return true;

       case M5OP_INIT_PARAM:
-        return invokeSimcall<ABI>(tc, initParam);
+        result = invokeSimcall<ABI>(tc, initParam);
+        return true;

       case M5OP_LOAD_SYMBOL:
         invokeSimcall<ABI>(tc, loadsymbol);
-        break;
+        return true;

       case M5OP_RESET_STATS:
         invokeSimcall<ABI>(tc, resetstats);
-        break;
+        return true;

       case M5OP_DUMP_STATS:
         invokeSimcall<ABI>(tc, dumpstats);
-        break;
+        return true;

       case M5OP_DUMP_RESET_STATS:
         invokeSimcall<ABI>(tc, dumpresetstats);
-        break;
+        return true;

       case M5OP_CHECKPOINT:
         invokeSimcall<ABI>(tc, m5checkpoint);
-        break;
+        return true;

       case M5OP_WRITE_FILE:
-        return invokeSimcall<ABI>(tc, writefile);
+        result = invokeSimcall<ABI>(tc, writefile);
+        return true;

       case M5OP_READ_FILE:
-        return invokeSimcall<ABI>(tc, readfile);
+        result = invokeSimcall<ABI>(tc, readfile);
+        return true;

       case M5OP_DEBUG_BREAK:
         invokeSimcall<ABI>(tc, debugbreak);
-        break;
+        return true;

       case M5OP_SWITCH_CPU:
         invokeSimcall<ABI>(tc, switchcpu);
-        break;
+        return true;

       case M5OP_ADD_SYMBOL:
         invokeSimcall<ABI>(tc, addsymbol);
-        break;
+        return true;

       case M5OP_PANIC:
         panic("M5 panic instruction called at %s\n", tc->pcState());

       case M5OP_WORK_BEGIN:
         invokeSimcall<ABI>(tc, workbegin);
-        break;
+        return true;

       case M5OP_WORK_END:
         invokeSimcall<ABI>(tc, workend);
-        break;
+        return true;

       case M5OP_ANNOTATE:
       case M5OP_RESERVED2:
@@ -231,28 +240,26 @@
       case M5OP_RESERVED4:
       case M5OP_RESERVED5:
         warn("Unimplemented m5 op (%#x)\n", func);
-        break;
+        return false;

       /* SE mode functions */
       case M5OP_SE_SYSCALL:
         invokeSimcall<ABI>(tc, m5Syscall);
-        break;
+        return true;

       case M5OP_SE_PAGE_FAULT:
         invokeSimcall<ABI>(tc, TheISA::m5PageFault);
-        break;
+        return true;

       /* dist-gem5 functions */
       case M5OP_DIST_TOGGLE_SYNC:
         invokeSimcall<ABI>(tc, togglesync);
-        break;
+        return true;

       default:
         warn("Unhandled m5 op: %#x\n", func);
-        break;
+        return false;
     }
-
-    return 0;
 }

 } // namespace PseudoInst

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I3e71c277f175c69af0d1adeb3299d88d095dfa84
Gerrit-Change-Number: 25948
Gerrit-PatchSet: 14
Gerrit-Owner: Gabe Black <gabebl...@google.com>
Gerrit-Reviewer: Alexandru Duțu <alexandru.d...@amd.com>
Gerrit-Reviewer: Chun-Chen TK Hsu <chunchen...@google.com>
Gerrit-Reviewer: Gabe Black <gabebl...@google.com>
Gerrit-Reviewer: Gem5 Cloud Project GCB service account <345032938...@cloudbuild.gserviceaccount.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Jason Lowe-Power <power...@gmail.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-CC: Brandon Potter <brandon.pot...@amd.com>
Gerrit-MessageType: merged
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