Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/27246 )

Change subject: arm: Teach gem5 to recognize the gem5 semihosting immediate values.
......................................................................

arm: Teach gem5 to recognize the gem5 semihosting immediate values.

These give access to the gem5 extension calls, currently only the pseudo
ops.

Change-Id: I60ece82f1f084791971a2de0b54be2f0d9da243e
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/27246
Reviewed-by: Giacomo Travaglini <giacomo.travagl...@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Tested-by: kokoro <noreply+kok...@google.com>
Tested-by: Gem5 Cloud Project GCB service account <345032938...@cloudbuild.gserviceaccount.com>
---
M src/arch/arm/isa/includes.isa
M src/arch/arm/isa/insts/misc.isa
M src/arch/arm/isa/insts/misc64.isa
M src/arch/arm/semihosting.hh
4 files changed, 23 insertions(+), 4 deletions(-)

Approvals:
  Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass
  Gem5 Cloud Project GCB service account: Regressions pass



diff --git a/src/arch/arm/isa/includes.isa b/src/arch/arm/isa/includes.isa
index 9cdc1f9..14d1c55 100644
--- a/src/arch/arm/isa/includes.isa
+++ b/src/arch/arm/isa/includes.isa
@@ -98,6 +98,7 @@
 #include "arch/arm/isa.hh"
 #include "arch/arm/isa_traits.hh"
 #include "arch/arm/pauth_helpers.hh"
+#include "arch/arm/semihosting.hh"
 #include "arch/arm/utility.hh"
 #include "arch/generic/memhelpers.hh"
 #include "base/condcodes.hh"
diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa
index e8935b8..b2f4591 100644
--- a/src/arch/arm/isa/insts/misc.isa
+++ b/src/arch/arm/isa/insts/misc.isa
@@ -40,10 +40,14 @@
     svcCode = '''
     ThreadContext *tc = xc->tcBase();

-    const auto semihost_imm = Thumb? 0xAB : 0x123456;
-
-    if (ArmSystem::haveSemihosting(tc) && imm == semihost_imm) {
+    bool have_semi = ArmSystem::haveSemihosting(tc);
+    if (have_semi && Thumb && imm == ArmSemihosting::T32Imm) {
+        // Enable gem5 extensions since we can't distinguish in thumb.
+        ArmSystem::callSemihosting32(tc, true);
+    } else if (have_semi && imm == ArmSemihosting::A32Imm) {
         ArmSystem::callSemihosting32(tc);
+    } else if (have_semi && imm == ArmSemihosting::Gem5Imm) {
+        ArmSystem::callSemihosting32(tc, true);
     } else {
         fault = std::make_shared<SupervisorCall>(machInst, imm);
     }
diff --git a/src/arch/arm/isa/insts/misc64.isa b/src/arch/arm/isa/insts/misc64.isa
index e2cfb41..656a234 100644
--- a/src/arch/arm/isa/insts/misc64.isa
+++ b/src/arch/arm/isa/insts/misc64.isa
@@ -185,8 +185,11 @@

     hltCode = '''
     ThreadContext *tc = xc->tcBase();
-    if (ArmSystem::haveSemihosting(tc) && imm == 0xF000) {
+    bool have_semi = ArmSystem::haveSemihosting(tc);
+    if (imm == ArmSemihosting::A64Imm && have_semi) {
         ArmSystem::callSemihosting64(tc);
+    } else if (imm == ArmSemihosting::Gem5Imm && have_semi) {
+        ArmSystem::callSemihosting64(tc, true);
     } else {
         // HLT instructions aren't implemented, so treat them as undefined
         // instructions.
diff --git a/src/arch/arm/semihosting.hh b/src/arch/arm/semihosting.hh
index 83d41fd..e9dc984 100644
--- a/src/arch/arm/semihosting.hh
+++ b/src/arch/arm/semihosting.hh
@@ -73,6 +73,17 @@
 {
   public:

+    enum {
+        // Standard ARM immediate values which trigger semihosting.
+        T32Imm = 0xAB,
+        A32Imm = 0x123456,
+        A64Imm = 0xF000,
+
+ // The immediate value which enables gem5 semihosting calls. Use the
+        // standard value for thumb.
+        Gem5Imm = 0x5D57
+    };
+
     static PortProxy &portProxy(ThreadContext *tc);

     struct AbiBase

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I60ece82f1f084791971a2de0b54be2f0d9da243e
Gerrit-Change-Number: 27246
Gerrit-PatchSet: 19
Gerrit-Owner: Gabe Black <gabebl...@google.com>
Gerrit-Reviewer: Bobby R. Bruce <bbr...@ucdavis.edu>
Gerrit-Reviewer: Ciro Santilli <ciro.santi...@arm.com>
Gerrit-Reviewer: Earl Ou <shunhsin...@google.com>
Gerrit-Reviewer: Gabe Black <gabebl...@google.com>
Gerrit-Reviewer: Gem5 Cloud Project GCB service account <345032938...@cloudbuild.gserviceaccount.com>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Jason Lowe-Power <power...@gmail.com>
Gerrit-Reviewer: Yu-hsin Wang <yuhsi...@google.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-MessageType: merged
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