there is a status() accessor method, but nothing uses. It seems unnecessary to to have a method to read the a variable that only the object that contains that variable uses.
Ali On Jun 29, 2008, at 7:45 PM, Ali Saidi wrote: > # HG changeset patch > # User Ali Saidi <[EMAIL PROTECTED]> > # Date 1214782927 14400 > # Node ID ada5724fbc53640aa6b85ba82e5a43d2e7a67092 > # Parent d9de38fba64c204f5eb5ea87adb9b9c0c9e9c1c6 > After a checkpoint (and thus a stats reset), the not_idle_fraction/ > notIdleFraction statistic is really wrong. > The notIdleFraction statistic isn't updated when the statistics > reset, probably because the cpu Status information > was pulled into the atomic and timing cpus. This changeset pulls > Status back into the BaseSimpleCPU object. Anyone > care to comment on the odd naming of the Status instance? It > shouldn't just be status because that is confusing > with Port::Status, but _status seems a bit strage too. > > diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc > --- a/src/cpu/simple/atomic.cc > +++ b/src/cpu/simple/atomic.cc > @@ -176,8 +176,6 @@ AtomicSimpleCPU::serialize(ostream &os) > { > SimObject::State so_state = SimObject::getState(); > SERIALIZE_ENUM(so_state); > - Status _status = status(); > - SERIALIZE_ENUM(_status); > BaseSimpleCPU::serialize(os); > nameOut(os, csprintf("%s.tickEvent", name())); > tickEvent.serialize(os); > @@ -188,7 +186,6 @@ AtomicSimpleCPU::unserialize(Checkpoint > { > SimObject::State so_state; > UNSERIALIZE_ENUM(so_state); > - UNSERIALIZE_ENUM(_status); > BaseSimpleCPU::unserialize(cp, section); > tickEvent.unserialize(cp, csprintf("%s.tickEvent", section)); > } > @@ -213,7 +210,7 @@ void > void > AtomicSimpleCPU::switchOut() > { > - assert(status() == Running || status() == Idle); > + assert(_status == Running || _status == Idle); > _status = SwitchedOut; > > tickEvent.squash(); > diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh > --- a/src/cpu/simple/atomic.hh > +++ b/src/cpu/simple/atomic.hh > @@ -47,19 +47,6 @@ class AtomicSimpleCPU : public BaseSimpl > virtual ~AtomicSimpleCPU(); > > virtual void init(); > - > - public: > - // > - enum Status { > - Running, > - Idle, > - SwitchedOut > - }; > - > - protected: > - Status _status; > - > - Status status() const { return _status; } > > private: > > diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc > --- a/src/cpu/simple/base.cc > +++ b/src/cpu/simple/base.cc > @@ -174,12 +174,13 @@ BaseSimpleCPU::resetStats() > BaseSimpleCPU::resetStats() > { > // startNumInst = numInst; > - // notIdleFraction = (_status != Idle); > + notIdleFraction = (_status != Idle); > } > > void > BaseSimpleCPU::serialize(ostream &os) > { > + SERIALIZE_ENUM(_status); > BaseCPU::serialize(os); > // SERIALIZE_SCALAR(inst); > nameOut(os, csprintf("%s.xc.0", name())); > @@ -189,6 +190,7 @@ void > void > BaseSimpleCPU::unserialize(Checkpoint *cp, const string §ion) > { > + UNSERIALIZE_ENUM(_status); > BaseCPU::unserialize(cp, section); > // UNSERIALIZE_SCALAR(inst); > thread->unserialize(cp, csprintf("%s.xc.0", section)); > diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh > --- a/src/cpu/simple/base.hh > +++ b/src/cpu/simple/base.hh > @@ -128,6 +128,20 @@ class BaseSimpleCPU : public BaseCPU > ThreadContext *tc; > protected: > int cpuId; > + > + enum Status { > + Idle, > + Running, > + IcacheRetry, > + IcacheWaitResponse, > + IcacheWaitSwitch, > + DcacheRetry, > + DcacheWaitResponse, > + DcacheWaitSwitch, > + SwitchedOut > + }; > + > + Status _status; > > public: > > diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc > --- a/src/cpu/simple/timing.cc > +++ b/src/cpu/simple/timing.cc > @@ -145,7 +145,7 @@ TimingSimpleCPU::drain(Event *drain_even > { > // TimingSimpleCPU is ready to drain if it's not waiting for > // an access to complete. > - if (status() == Idle || status() == Running || status() == > SwitchedOut) { > + if (_status == Idle || _status == Running || _status == > SwitchedOut) { > changeState(SimObject::Drained); > return 0; > } else { > @@ -179,7 +179,7 @@ void > void > TimingSimpleCPU::switchOut() > { > - assert(status() == Running || status() == Idle); > + assert(_status == Running || _status == Idle); > _status = SwitchedOut; > numCycles += tickToCycles(curTick - previousTick); > > diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh > --- a/src/cpu/simple/timing.hh > +++ b/src/cpu/simple/timing.hh > @@ -46,24 +46,6 @@ class TimingSimpleCPU : public BaseSimpl > virtual void init(); > > public: > - // > - enum Status { > - Idle, > - Running, > - IcacheRetry, > - IcacheWaitResponse, > - IcacheWaitSwitch, > - DcacheRetry, > - DcacheWaitResponse, > - DcacheWaitSwitch, > - SwitchedOut > - }; > - > - protected: > - Status _status; > - > - Status status() const { return _status; } > - > Event *drainEvent; > > private: > _______________________________________________ > m5-dev mailing list > m5-dev@m5sim.org > http://m5sim.org/mailman/listinfo/m5-dev > _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev