changeset 4c4b5dfc9944 in /z/repo/m5
details: http://repo.m5sim.org/m5?cmd=changeset;node=4c4b5dfc9944
description:
style: missed space after switch
diffstat:
0 files changed
diffs (129 lines):
diff -r 875cb7d09831 -r 4c4b5dfc9944 src/arch/mips/dsp.cc
--- a/src/arch/mips/dsp.cc Fri Sep 26 08:18:57 2008 -0700
+++ b/src/arch/mips/dsp.cc Fri Sep 26 09:37:21 2008 -0700
@@ -63,7 +63,7 @@
{
int64_t svalue = (int64_t)value;
- switch(sign) {
+ switch (sign) {
case SIGNED:
if (svalue > (int64_t)FIXED_SMAX[fmt]) {
*overflow = 1;
@@ -93,7 +93,7 @@
{
int64_t svalue = (int64_t)value;
- switch(sign)
+ switch (sign)
{
case SIGNED:
if (svalue > (int64_t)FIXED_SMAX[fmt] ||
@@ -431,7 +431,7 @@
simdUnpack(a, a_values, SIMD_FMT_QB, UNSIGNED);
simdUnpack(b, b_values, SIMD_FMT_PH, UNSIGNED);
- switch(mode) {
+ switch (mode) {
case MODE_L:
for (int i = 0; i < nvals; i++)
b_values[i] = dspSaturate(a_values[i + 2] * b_values[i],
@@ -466,7 +466,7 @@
simdUnpack(a, a_values, SIMD_FMT_PH, SIGNED);
simdUnpack(b, b_values, SIMD_FMT_PH, SIGNED);
- switch(mode) {
+ switch (mode) {
case MODE_L:
for (int i = 0; i < nvals; i++)
c_values[i] = dspSaturate(a_values[i + 1] * b_values[i + 1] << 1,
@@ -504,7 +504,7 @@
simdUnpack(b, b_values, infmt, SIGNED);
for (int i = 0; i < nvals; i++) {
- switch(mode) {
+ switch (mode) {
case MODE_X:
if (a_values[nvals - 1 - i] == FIXED_SMIN[infmt] &&
b_values[i] == FIXED_SMIN[infmt]) {
@@ -571,7 +571,7 @@
simdUnpack(b, b_values, infmt, SIGNED);
for (int i = 0; i < nvals; i++) {
- switch(mode) {
+ switch (mode) {
case MODE_X:
if (a_values[nvals - 1 - i] == FIXED_SMIN[infmt] &&
b_values[i] == FIXED_SMIN[infmt]) {
@@ -634,7 +634,7 @@
simdUnpack(b, b_values, fmt, sign);
for (int i = 0; i < 2; i++) {
- switch(mode) {
+ switch (mode) {
case MODE_L:
dspac += a_values[nvals - 1 - i] * b_values[nvals - 1 - i];
break;
@@ -662,7 +662,7 @@
simdUnpack(b, b_values, fmt, sign);
for (int i = 0; i < 2; i++) {
- switch(mode) {
+ switch (mode) {
case MODE_L:
dspac -= a_values[nvals - 1 - i] * b_values[nvals - 1 - i];
break;
@@ -692,7 +692,7 @@
simdUnpack(b, b_values, fmt, SIGNED);
for (int i = 0; i < nvals; i++) {
- switch(mode) {
+ switch (mode) {
case MODE_L:
temp = a_values[i + 1] * b_values[i + 1] << 1;
if (a_values[i + 1] == FIXED_SMIN[fmt] &&
@@ -780,7 +780,7 @@
for (int i = 0; i < nvals; i++) {
int cc = 0;
- switch(op) {
+ switch (op) {
case CMP_EQ:
cc = (a_values[i] == b_values[i]);
break;
@@ -812,7 +812,7 @@
for (int i = 0; i < nvals; i++) {
int cc = 0;
- switch(op) {
+ switch (op) {
case CMP_EQ:
cc = (a_values[i] == b_values[i]);
break;
@@ -846,7 +846,7 @@
for (int i = 0; i < nvals; i++) {
int cc = 0;
- switch(op) {
+ switch (op) {
case CMP_EQ:
cc = (a_values[i] == b_values[i]);
break;
@@ -888,7 +888,7 @@
simdUnpack(a, in_values, infmt, insign);
for (int i = 0; i<noutvals; i++) {
- switch(mode) {
+ switch (mode) {
case MODE_L:
out_values[i] = in_values[i + (ninvals >> 1)] << sa;
break;
@@ -1140,7 +1140,7 @@
int nvals = SIMD_NVALS[fmt];
int nbits = SIMD_NBITS[fmt];
- switch(sign) {
+ switch (sign) {
case SIGNED:
for (int i = 0; i < nvals; i++) {
uint64_t tmp = (uint64_t)bits(reg, nbits * (i + 1) - 1, nbits * i);
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