Any update on a diff korey? We need to get this done and out the door. Nate
On Tue, Sep 30, 2008 at 10:07 AM, Korey Sewell <[EMAIL PROTECTED]> wrote: >> Can we talk to Jaidev? Do you have his e-mail address? > Sure, I can email him... > >> I'd like to >> get this figured out. Do they have updated code perhaps? > I'm pretty sure that is the appropriate fix. Full coverage of the > shadow-sets in regression testing wasnt available previously so like I > said before this is a case of implementing every instruction on the > MIPS32 ISA specification for possible future cases then "this code > works and now it's broken". > >>> Wrgpr and Rdgpr are functions for the sole purpose of having shadow >>> set register compatibility. >> It seems that these instructions are the only one that use those >> functions which seems decidedly odd. > It's not odd, it's just how the MIPS32 ISA is defined. If you would > like to read/write from a shadow set that's not the current set than > you must use these instructions. > >>> if (intReg >= NumIntArchRegs * NumShadowRegSets) { >> Is this condition correct? Should we just be checking if intReg >= >> NumIntArchRegs? > Nope, I'm not agreeing to that. So okay, maybe I should just drum up a > patch then .... :). The Number of Registers in the IntRegFile is the > number of architectural registers + HI/LO registers + DSP registers... > Those need to be replicated per shadow set. If you just say > NumIntArchRegs * ShadowRegSets you mess up the mapping. That should > still be intReg < NumIntRegs. > > The rest of your comments have some merit but like I said before it's > not like this shadow set code was ever *working* as much as it was > just coexisting in the code. So what we are doing here is trying to > fix something that has no test case in the 1st place. > > What I can do is fix it and make it consistent with the rest of M5 and > the MIPS32 ISA and then email Jaidev to see if there are any updates > to the shadow set code. I thought this was a gcc 4.3 warning problem > but obviously not. I thought we had warnings in the compiles > previously but I guess the current goal for "stable" is "warning-free" > code? > > In terms of there regression tests, its really not something they can > handover in terms of "here's the code". Needless to say, I cant go > into exactly what they have but it's not a list of files that you can > cross-compile to any architecture rather a large test suite that > exhaustively tests every instruction ... > > -- > ---------- > Korey L Sewell > Graduate Student - PhD Candidate > Computer Science & Engineering > University of Michigan > _______________________________________________ > m5-dev mailing list > m5-dev@m5sim.org > http://m5sim.org/mailman/listinfo/m5-dev > > _______________________________________________ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev